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ksz9031phy芯片手册
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更新于2023-05-27
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ksz9031的芯片手册,不错的资源并且添加了注释,此款phy芯片只包含rgmii接口。寄存器内容精简,时一款不错的汽车级别芯片。
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2016-2017 Microchip Technology Inc. DS00002117E-page 1
Features
• Single-Chip 10/100/1000 Mbps Ethernet Trans-
ceiver Suitable for IEEE 802.3 Applications
• RGMII Timing Supports On-Chip Delay According
to RGMII Version 2.0, with Programming Options
for External Delay and Making Adjustments and
Corrections to TX and RX Timing Paths
• RGMII with 3.3V/2.5V/1.8V Tolerant I/Os
• Auto-Negotiation to Automatically Select the
Highest Link-Up Speed (10/100/1000 Mbps) and
Duplex (Half/Full)
• On-Chip Termination Resistors for the Differential
Pairs
• On-Chip LDO Controller to Support Single 3.3V
Supply Operation – Requires Only One External
FET to Generate 1.2V for the Core
• Jumbo Frame Support up to 16 KB
• 125 MHz Reference Clock Output
• Energy Detect Power-Down Mode for Reduced
Power Consumption When the Cable is Not
Attached
• Wake-On-LAN (WOL) Support with Robust Cus-
tom-Packet Detection
• Programmable LED Outputs for Link, Activity, and
Speed
• Baseline Wander Correction
• LinkMD TDR-Based Cable Diagnostic to Identify
Faulty Copper Cabling
• Parametric NAND Tree Support to Detect Faults
Between Chip I/Os and Board
• Loopback Modes for Diagnostics
• Automatic MDI/MDI-X Crossover to Detect and
Correct Pair Swap at all Speeds of Operation
• Automatic Detection and Correction of Pair
Swaps, Pair Skew, and Pair Polarity
• MDC/MDIO Management Interface for PHY Reg-
ister Configuration
• Interrupt Pin Option
• Power-Down and Power-Saving Modes
• Operating Voltages
- Core (DVDDL, AVDDL, AVDDL_PLL): 1.2V
(External FET or Regulator)
- VDD I/O (DVDDH): 3.3V, 2.5V, or 1.8V
- Transceiver (AVDDH): 3.3V or 2.5V (Com-
mercial Temp.)
• AEC-Q100 Grade 3 (KSZ9031RNXUA/UB) and
Grade 2 (KSZ9031RNXVA/VB) Qualified for Auto-
motive Applications
• 48-pin QFN (7 mm × 7 mm) Package
Target Applications
• Laser/Network Printer
• Network Attached Storage (NAS)
• Network Server
• Gigabit LAN on Motherboard (GLOM)
• Broadband Gateway
• Gigabit SOHO/SMB Router
•IPTV
• IP Set-Top Box
• Game Console
• Triple-Play (Data, Voice, Video) Media Center
• Industrial Control
• Automotive In-Vehicle Networking
KSZ9031RNX
Gigabit Ethernet Transceiver with RGMII
Support
KSZ9031RNX
DS00002117E-page 2 2016-2017 Microchip Technology Inc.
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at docerrors@microchip.com. We welcome your feedback.
Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur-
rent devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are
using.
Customer Notification System
Register on our web site at www.microchip.com to receive the most current information on all of our products.
2016-2017 Microchip Technology Inc. DS00002117E-page 3
KSZ9031RNX
Table of Contents
1.0 Introduction ..................................................................................................................................................................................... 4
2.0 Pin Description and Configuration .................................................................................................................................................. 5
3.0 Functional Description .................................................................................................................................................................. 13
4.0 Register Descriptions .................................................................................................................................................................... 31
5.0 Operational Characteristics ........................................................................................................................................................... 52
6.0 Electrical Characteristics ............................................................................................................................................................... 53
7.0 Timing Diagrams ........................................................................................................................................................................... 57
8.0 Reset Circuit ................................................................................................................................................................................. 63
9.0 Reference Circuits — LED Strap-In Pins ...................................................................................................................................... 65
10.0 Reference Clock - Connection and Selection ............................................................................................................................. 66
11.0 On-Chip LDO Controller - MOSFET Selection ............................................................................................................................ 66
12.0 Magnetic - Connection and Selection ......................................................................................................................................... 67
13.0 Package Outlines ........................................................................................................................................................................ 69
Appendix A: Data Sheet Revision History ........................................................................................................................................... 74
The Microchip Web Site ...................................................................................................................................................................... 76
Customer Change Notification Service ............................................................................................................................................... 76
Customer Support ............................................................................................................................................................................... 76
Product Identification System ............................................................................................................................................................. 77
KSZ9031RNX
DS00002117E-page 4 2016-2017 Microchip Technology Inc.
1.0 INTRODUCTION
1.1 General Description
The KSZ9031RNX is a completely integrated triple-speed (10BASE-T/100BASE-TX/1000BASE-T) Ethernet physical-
layer transceiver for transmission and reception of data on standard CAT-5 unshielded twisted pair (UTP) cable.
The KSZ9031RNX provides the Reduced Gigabit Media Independent Interface (RGMII) for direct connection to RGMII
MACs in Gigabit Ethernet processors and switches for data transfer at 10/100/1000 Mbps.
The KSZ9031RNX reduces board cost and simplifies board layout by using on-chip termination resistors for the four
differential pairs and by integrating an LDO controller to drive a low-cost MOSFET to supply the 1.2V core.
The KSZ9031RNX offers diagnostic features to facilitate system bring-up and debugging in production testing and in
product deployment. Parametric NAND tree support enables fault detection between KSZ9031 I/Os and the board. The
LinkMD
®
TDR-based cable diagnostic identifies faulty copper cabling. Remote and local loopback functions verify ana-
log and digital data paths.
The standard KSZ9031RNX is available in a 48-pin, lead-free QFN package, and the AEC-Q100 automotive qualified
parts, KSZ9031RNXUA/UB and KSZ9031RNXVA/VB, are available in a 48-pin lead-free VQFN (wettable) package.
FIGURE 1-1: SYSTEM BLOCK DIAGRAM
RGMII
10/100/1000Mbps
RGMII
ETHERNET MAC
MDC/MDIO
MANAGEMENT
KSZ9031RNX
LDO
CONTROLLER
ON-CHIP TERMINATION
RESISTORS
VIN
3.3VA
VOUT
1.2V (FOR CORE VOLTAGES)
MAGNETICS
RJ-45
CONNECTOR
MEDIA TYPES
10Base-T
100Base-TX
1000Base-T
(SYSTEM POWER CIRCUIT)
PME_N
2016-2017 Microchip Technology Inc. DS00002117E-page 5
KSZ9031RNX
2.0 PIN DESCRIPTION AND CONFIGURATION
FIGURE 2-1: 48-QFN PIN ASSIGNMENT (TOP VIEW)
1
TXRXP_A
LED2/
PHYAD1
4142434445464748
PADDLE GROUND
(ON BOTTOM OF CHIP)
37383940
2
TXRXM_A
3
4
5
AVDDL
6
AVDDH
7
8
9
10
TXRXP_B
11
TXRXM_B
AVDDL
2019181716151413 24232221
LED1 /
PME_N1 /
PHYAD0
DV
DD
H
TXD0
DVDDL
TXD2
TXD3
DVDDL
36
35
34
33
32
31
30
29
28
27
26
25
DVDDL
TX_EN
RXD1/
MODE1
RXD0/
MODE0
RX_DV/
CLK125_EN
DVDDH
VSS
RX_CLK/
PHYAD2
RESET_N
ISET
NC
XI
XO
AVDDL_PLL
LDO_O
DVDDH
CLK125_NDO/
LED_MODE
DVDDL
INT_N/
PME_N2
MDIO
TXD1
DVDDL
KSZ9031RNX
12
AVDDH
TXRXP_C
TXRXM_C
TXRXP_D
TXRXM_D
MDC
RXD2/
MODE2
RXD3/
MODE3
DVDDL
GTX_CLK
NC
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