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Digital System Test and Testable Design by Z Navabi.pdf

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This is a book on test and testability of digital circuits in which test is spoken in the language of design.

Digital System Test and Testable Design

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Zainalabedin Navabi

Digital System Test

and Testable Design

Using HDL Models and Architectures

Zainalabedin Navabi

Worcester Polytechnic Institute

Department of Electrical & Computer

Engineering

Worcester, MA

USA

navabi@ece.wpi.edu

ISBN 978-1-4419-7547-8 e-ISBN 978-1-4419-7548-5

DOI 10.1007/978-1-4419-7548-5

Springer New York Dordrecht Heidelberg London

 Springer Science+Business Media, LLC 2011

publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts

in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval,

electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is

forbidden.

The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as

such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights.

Printed on acid-free paper

Springer is part of Springer Science+Business Media (www.springer.com)

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Digital system test and testable design

2013-11-05 上传

这是一本关于数字电路的测试以及可测性的书，其中测试部分用设计语言描述出来。这本书展示了如何采用一些已建立的RTL级设计来测试数字电路。本书主要采用Verilog HDL模型建立测试，具有较好的实践性。 This is a book on test and testability of digital circuits in which test is spoken in the language of design. In this book, the concepts of testing and testability are treated together with digital design practices and methodologies. We show how testing digital circuits designing testable circuits can take advantage of some of the well-established RT-level design and verification methodologies and tools. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms. In the testability part, it describes various scan and BIST methods in Verilog and uses Verilog testbenches as virtual testers to examine and evaluate these testability methods. In designing testable circuits, we use Verilog testbenches to evaluate, and thus improve testability of a design.

Digital Systems Testing & Testable Design

2012-10-16 上传

Digital Systems Testing and Testable Design一书，是全美大学生和研究生优秀教材，比较系统地介绍了结构测试的理论和方法、可测性设计理论和度量方法、测试数据的处理及简化的理论和方法以及智能芯片(处理器、数字信号处理器和自动机等)测试理论和方法等。该书共有15章，分为3部分。前8章为第一部分，主要介绍数字系统、数字微系统芯片缺陷的来源、逻辑描述的方法——故障的建模、故障模拟、测试单固定故障、测试桥接故障、智能数字系统的功能测试及其范围等；第9章～第14章是第二部分，主要介绍数字系统的可测性设计理论和方法、建内自测试BIST测试数据压缩方法等现代测试理论和方法；第15章足第三部分，主要讨论系统测试的方法。该书概念清晰层次分明、定义和证明准确、算法推导和阐述简练。每章附有大量练习题可帮助读者对于概念的消化吸收。

Digital Systems Testing and Testable Design

2011-07-31 上传

Digital Systems Testing and Testable Design Miron Abramovici 数字系统测试和可测性设计图书简介： Digital Systems Testing and Testable Design一书，是全美大学生和研究生优秀教材，比较系统地介绍了结构测试的理论和方法、可测性设计理论和度量方法、测试数据的处理及简化的理论和方法以及智能芯片(处理器、数字信号处理器和自动机等)测试理论和方法等。该书共有15章，分为3部分。前8章为第一部分，主要介绍数字系统、数字微系统芯片缺陷的来源、逻辑描述的方法——故障的建模、故障模拟、测试单固定故障、测试桥接故障、智能数字系统的功能测试及其范围等；第9章～第14章是第二部分，主要介绍数字系统的可测性设计理论和方法、建内自测试BIST测试数据压缩方法等现代测试理论和方法；第15章足第三部分，主要讨论系统测试的方法。该书概念清晰层次分明、定义和证明准确、算法推导和阐述简练。每章附有大量练习题可帮助读者对于概念的消化吸收。可惜的是，只是该书前半部分，不完整

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Digital System Test and Testable Design by Z Navabi.pdf

Digital system test and testable design

Digital Systems Testing & Testable Design

Digital Systems Testing and Testable Design

digital system test and testable design pdf

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