SSD2828QN4 Rev 1.0 P 4/167 Oct 2012 Solomon Systech
8.1.27 Delay Adjustment Register 3.......................................................................................................................56
8.1.28 Delay Adjustment Register 4.......................................................................................................................57
8.1.29 Delay Adjustment Register 5.......................................................................................................................58
8.1.30 Delay Adjustment Register 6.......................................................................................................................59
8.1.31 HS TX Timer Register 1..............................................................................................................................60
8.1.32 HS TX Timer Register 2..............................................................................................................................61
8.1.33 LP RX Timer Register 1..............................................................................................................................62
8.1.34 LP RX Timer Register 2..............................................................................................................................63
8.1.35 TE Status Register.......................................................................................................................................64
8.1.36 SPI Read Register.......................................................................................................................................65
8.1.37 PLL Lock Register.......................................................................................................................................66
8.1.38 Test Register ...............................................................................................................................................67
8.1.39 TE Count Register.......................................................................................................................................69
8.1.40 Analog Control Register .............................................................................................................................70
8.1.41 Analog Control Register 2 ..........................................................................................................................71
8.1.42 Analog Control Register 3 ..........................................................................................................................72
8.1.43 Analog Control Register 4 ..........................................................................................................................73
8.1.44 Interrupt Output Control Register ..............................................................................................................74
8.1.45 RGB Interface Control Register 7...............................................................................................................75
8.1.46 Lane Configuration Register.......................................................................................................................76
8.1.47 Delay Adjustment Register 7.......................................................................................................................77
8.1.48 Pull Control Register 1...............................................................................................................................78
8.1.49 Pull Control Register 2...............................................................................................................................80
8.1.50 Pull Control Register 3...............................................................................................................................81
8.1.51 CABC Brightness Control Register 1..........................................................................................................82
8.1.52 CABC Brightness Control Register 2..........................................................................................................83
8.1.53 CABC Brightness Status Register ...............................................................................................................84
8.1.54 Encoder Control Register ...........................................................................................................................85
8.1.55 Video Sync Delay Register..........................................................................................................................86
8.1.56 Trimming Register ......................................................................................................................................87
8.1.57 GPIO1 Register...........................................................................................................................................89
8.1.58 GPIO2 Register...........................................................................................................................................91
8.1.59 DLYA01 Register ........................................................................................................................................93
8.1.60 DLYA23 Register ........................................................................................................................................94
8.1.61 DLYB01 Register ........................................................................................................................................95
8.1.62 DLYB23 Register ........................................................................................................................................96
8.1.63 DLYC01 Register ........................................................................................................................................97
8.1.64 DLYC23 Register ........................................................................................................................................98
8.1.65 Analog Control Register 5 ..........................................................................................................................99
8.1.66 Read Register............................................................................................................................................101
9 CONFIGURATION................................................................................................................. 102
9.1 LANE MANAGEMENT .........................................................................................................................................102
9.2 USE CASES .........................................................................................................................................................103
9.2.1 RGB + SPI Interface.................................................................................................................................103
9.2.2 MIPI DC Characteristics..........................................................................................................................105
9.2.3 High Speed Clock Transmission ...............................................................................................................106
9.2.4 Data Lane State Flow ...............................................................................................................................106
9.2.5 High Speed Data Transmission.................................................................................................................107
9.2.6 Bi-Directional Data Lane Turnaround.....................................................................................................109
9.2.7 Escape Mode.............................................................................................................................................109
9.2.8 Low Power Data Transmission.................................................................................................................111
9.2.9 Reset Trigger.............................................................................................................................................112
9.2.10 Tearing Effect............................................................................................................................................113
9.2.11 Acknowledge.............................................................................................................................................114
9.2.12 Packet Transmission.................................................................................................................................115
9.2.13 HS Transmission Example ........................................................................................................................115
9.2.14 General Packet Structure..........................................................................................................................116
9.2.15 Long Packet Format .................................................................................................................................116
9.2.16 Short Packet Structure..............................................................................................................................117
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