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HDMI发送器SiI9134芯片手册和编程指南
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silicon image公司的HDMI1.3发送芯片SiI9134全芯片手册,和编程指南。网上下载不到的东西啊。
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This document was watermarked on 16-01-2008 at 14:14:51 local time.
Silicon Image
Confidential
for
CAV Audio CHINA INC.
Internal Use Only
Data Sheet
SiI9134 HDMI Deep Color Transmitter
Data Sheet
Document # SiI-DS-0193-D
Silicon Image
Confidential
for
CAV Audio CHINA INC.
Internal Use Only
SiI9134 HDMI Deep Color Transmitter
Data Sheet
Silicon Image, Inc.
October 2007
Copyright Notice
Copyright © 2007 Silicon Image, Inc. All rights reserved. These materials contain proprietary and confidential information
(including trade secrets, copyright and other interests) of Silicon Image, Inc. You may not use these materials except only for
your bona fide non-commercial evaluation of your potential purchase of products and/services from Silicon Image or its
affiliates, and/or only in connection with your purchase of products and/or services from Silicon Image or its affiliates, and
only in accordance with the terms and conditions herein. You have no right to copy, modify, transfer, sublicense, publicly
display, create derivative works of or distribute these materials, or otherwise make these materials available, in whole or in
part, to any third party.
Trademark Acknowledgment
Silicon Image™, VastLane™, SteelVine™, PinnaClear™, Simplay™, Simplay HD™, Satalink™, and TMDS™ are
trademarks or registered trademarks of Silicon Image, Inc. in the United States and other countries. HDMI™, the HDMI logo
and High-Definition Multimedia Interface™ are trademarks or registered trademarks of, and are used under license from,
HDMI Licensing, LLC.
Further Information
To request other materials, documentation, and information, contact your local Silicon Image, Inc. sales office or visit the
Silicon Image, Inc. web site at www.siliconimage.com
.
Revision History
Revision Date Comment
A 11/06 Tables of AC and DC specification were updated.
B 12/06 Updated DC specifications and overall formatting.
B01 2/07 Updated I
CCT
and I
STBY
specifications.
C 4/07 Added Audio Down-sampler information and HDMI design considerations
D 10/07 Corrected DC and Digital I/O specifications, hot plug information, and other
content
© 2007 Silicon Image. Inc.
SiI-DS-0193-D ii © 2007 Silicon Image, Inc. CONFIDENTIAL
Silicon Image
Confidential
for
CAV Audio CHINA INC.
Internal Use Only
SiI9134 HDMI Deep Color Transmitter
Data Sheet
Silicon Image, Inc.
Table of Contents
General Description...................................................................................................................................................... 1
Features ..................................................................................................................................................................... 1
SiI9134 Transmitter Pin Diagram............................................................................................................................... 3
Functional Description................................................................................................................................................. 4
SiI9134 HDMI Deep Color Transmitter Compared with SiI9030/9034 devices.................................................. 4
Video Data Input and Conversion........................................................................................................................... 5
Video Processing Pipeline ...................................................................................................................................... 5
Input Clock Multiplier/Divider............................................................................................................................... 5
Video Data Capture Logic ...................................................................................................................................... 5
Configuration to Support Deep-color ..................................................................................................................... 5
Common Video Input Formats................................................................................................................................6
Embedded Sync Decoding...................................................................................................................................... 6
Data Enable Generator............................................................................................................................................ 6
Re-sampling............................................................................................................................................................ 6
Color Space Converters (CSC)............................................................................................................................... 7
14-to-8/10/12-Dither............................................................................................................................................... 7
Color Range Scaling ............................................................................................................................................... 8
Clipping .................................................................................................................................................................. 8
HDCP Encryption Engine/XOR Mask ................................................................................................................... 8
TMDS Digital Core ................................................................................................................................................ 8
Audio Data Capture Logic....................................................................................................................................... 9
S/PDIF .................................................................................................................................................................... 9
I
2
S ........................................................................................................................................................................... 9
One-Bit Audio Input (DSD/SACD)........................................................................................................................ 9
High-Bit Rate Audio on HDMI .............................................................................................................................. 9
Audio DownSampler Limitations.......................................................................................................................... 10
HDCP Key ROM .....................................................................................................................................................11
Interrupt Out ...........................................................................................................................................................11
Control and Configuration .................................................................................................................................... 12
Registers/Configuration Logic.............................................................................................................................. 12
Microcontroller Slave I
2
C Interface...................................................................................................................... 12
DDC Master I
2
C Interface .................................................................................................................................... 12
Electrical Specifications ............................................................................................................................................. 13
Absolute Maximum Conditions............................................................................................................................. 13
Normal Operating Conditions............................................................................................................................... 13
DC Specifications.................................................................................................................................................... 14
Digital I/O Specifications
1
.................................................................................................................................... 14
DC Power Supply Pin Specifications ................................................................................................................... 15
AC Specifications.................................................................................................................................................... 16
TMDS AC Timing Specifications......................................................................................................................... 16
Audio AC Timing Specifications.......................................................................................................................... 17
Video AC Timing Specifications .......................................................................................................................... 18
Control Timing Specifications.............................................................................................................................. 19
Timing Diagrams .................................................................................................................................................... 20
Input Timing Diagrams......................................................................................................................................... 20
Audio Timing Diagrams ....................................................................................................................................... 22
Power Supply Sequencing .................................................................................................................................... 23
Output Timing Diagrams ...................................................................................................................................... 23
© 2007 Silicon Image, Inc. CONFIDENTIAL iii SiI-DS-0193-D
Silicon Image
Confidential
for
CAV Audio CHINA INC.
Internal Use Only
SiI9134 HDMI Deep Color Transmitter
Data Sheet
Silicon Image, Inc.
Pin Descriptions.......................................................................................................................................................... 24
Video and Audio Input Pins................................................................................................................................... 24
Configuration/Programming Pins......................................................................................................................... 25
Control Pins............................................................................................................................................................. 25
Differential Signal Data Pins ................................................................................................................................. 26
Power and Ground Pins ......................................................................................................................................... 26
Data Bus Mappings .................................................................................................................................................... 27
RGB and YCbCr 4:4:4 Formats with Separate Syncs .......................................................................................... 28
YC 4:2:2 Formats with Separate Syncs ................................................................................................................ 31
YC 4:2:2 Formats with Embedded Sync .............................................................................................................. 32
YC Mux 4:2:2 Formats with Separate Syncs........................................................................................................ 34
YC Mux 4:2:2 Embedded Sync Formats.............................................................................................................. 36
12/15/18-Bit DMO RGB and YCbCr Formats ..................................................................................................... 38
Design Guidelines ....................................................................................................................................................... 39
Power Supplies........................................................................................................................................................ 39
Voltage Ripple Regulation.................................................................................................................................... 39
Decoupling............................................................................................................................................................ 39
High-Speed TMDS Signals..................................................................................................................................... 40
ESD Protection ..................................................................................................................................................... 40
Transmitter Layout Guidelines ............................................................................................................................. 40
Protection for I
2
C Port ........................................................................................................................................... 41
Hot Plug Signal Conditioning................................................................................................................................41
HDMI Design Considerations................................................................................................................................41
HDMI CTS Test ID 7-4: TMDS Differential Rise and Fall Time......................................................................... 41
Recommendation to pass Test ID 7-4 ................................................................................................................... 41
EMI Considerations ............................................................................................................................................... 41
Typical Circuit ........................................................................................................................................................ 42
Power Supply Decoupling .................................................................................................................................... 42
HDMI Port TMDS Connections ........................................................................................................................... 43
Control Signal Connections.................................................................................................................................. 44
Packaging .................................................................................................................................................................... 45
100-pin TQFP Package Dimensions and Marking Specification........................................................................ 45
Ordering Information ................................................................................................................................................ 46
SiI-DS-0193-D iv © 2007 Silicon Image, Inc. CONFIDENTIAL
Silicon Image
Confidential
for
CAV Audio CHINA INC.
Internal Use Only
SiI9134 HDMI Deep Color Transmitter
Data Sheet
Silicon Image, Inc.
List of Figures
Figure 1. Functional Block Diagram .............................................................................................................................. 1
Figure 2. 100-Pin TQFP Pinout Diagram ....................................................................................................................... 3
Figure 3. Simplified Host I
2
C Ports ................................................................................................................................4
Figure 4. Transmitter Video Data Processing Path ......................................................................................................... 5
Figure 5: High Speed Data Transmission ..................................................................................................................... 10
Figure 6: High Bitrate Stream Before and after Reassembly and Splitting .................................................................. 10
Figure 7. High Bit Rate Stream After Splitting............................................................................................................. 10
Figure 8. Master I
2
C Supported Transactions............................................................................................................... 12
Figure 9. IDCK Clock Cycle/High/Low Times ............................................................................................................ 20
Figure 10. Control and Data Single-Edge Setup/Hold Times to IDCK........................................................................ 20
Figure 11. Dual-Edge Setup/Hold Times to IDCK....................................................................................................... 20
Figure 12. VSYNC and HSYNC Delay Times from/to DE.......................................................................................... 21
Figure 13. DE High/Low Times ................................................................................................................................... 21
Figure 14. RESET# Minimum Timings........................................................................................................................ 21
Figure 15. S/PDIF Input Timings ................................................................................................................................. 22
Figure 16. I
2
S Input Timings ........................................................................................................................................ 22
Figure 17. DSD Input Timings ..................................................................................................................................... 22
Figure 18. MCLK Timings .......................................................................................................................................... 22
Figure 19. Power Supply Sequencing........................................................................................................................... 23
Figure 20. Differential Transition Times ...................................................................................................................... 23
Figure 21. I
2
C Data Valid Delay (Driving Read Cycle Data) ....................................................................................... 23
Figure 22. INT Output Pin Response to HPD Input Change........................................................................................ 23
Figure 23. 4:4:4 RGB 36-Bit Timing Diagram............................................................................................................. 29
Figure 24. 4:4:4 YCbCr 36-Bit Timing Diagram.......................................................................................................... 29
Figure 25. 4:4:4 RGB 30-Bit Timing Diagram............................................................................................................. 29
Figure 26. 4:4:4 YCbCr 30-Bit Timing Diagram.......................................................................................................... 30
Figure 27. 4:4:4 RGB 24-Bit Timing Diagram............................................................................................................. 30
Figure 28. Figure 24. 4:4:4 RGB 24-Bit Timing Diagram ........................................................................................... 30
Figure 29. YC 4:2:2 12-Bit per Pixel Timing Diagram ................................................................................................ 33
Figure 30. YC 4:2:2 10-Bit per Pixel Timing Diagram ................................................................................................ 33
Figure 31. YC 4:2:2 8-Bit per Pixel Timing Diagram .................................................................................................. 33
Figure 32. YC Mux 4:2:2 Timing Diagram .................................................................................................................. 35
Figure 33. YC Mux 4:2:2 Embedded Sync Encoding Timing Diagram....................................................................... 37
Figure 34. 12-Bit Input DMO Timing Diagram ........................................................................................................... 38
Figure 35. Decoupling and Bypass Capacitor Placement............................................................................................. 39
Figure 36. Decoupling and Bypass Schematic ............................................................................................................. 39
Figure 37. Transmitter to HDMI Connector Routing – Top View................................................................................ 40
Figure 38. Power Supply Decoupling and PLL Filtering Schematic............................................................................ 42
Figure 39. HDMI Port TMDS Connections Schematic ................................................................................................ 43
Figure 40. HDMI Port ESD Protection Schematic ....................................................................................................... 43
Figure 41. Controller Connections Schematic.............................................................................................................. 44
Figure 42. 13 mm x 13 mm TQFP Package Diagram................................................................................................... 45
© 2007 Silicon Image, Inc. CONFIDENTIAL v SiI-DS-0193-D
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