Block Markov Superposition Transmission of BCH
Codes with Iterative Hard-decision Decoding
Nina Lin
1
, Suihua Cai
1
, and Xiao Ma
2,3
1
School of Electronics and Information Technology, Sun Yat-sen University, Guangzhou 510006, China
2
School of Data and Computer Science, Sun Yat-sen University, Guangzhou 510006, China
3
Guangdong Key Laboratory of Information Security Technology, Sun Yat-sen University, Guangzhou 510006, China
Email: linnina@mail2.sysu.edu.cn, caish5@mail2.sysu.edu.cn, maxiao@mail.sysu.edu.cn
Abstract—This paper is concerned with block Markov super-
position transmission of BCH (BMST-BCH) codes. Compared
with other BMST codes, BMST-BCH codes can achieve a lower
error floor with an encoding memory of two, which is critical to
reduce both delay and implementation complexity. To further re-
duce the implementation complexity, we propose a hard-decision
sliding-window decoding algorithm, in which only binary and/or
erasure messages are processed and exchanged between nodes. A
fast simulation approach is proposed, with the help of the genie-
aided lower bound and the density evolution analysis, to evaluate
the performance of BMST-BCH codes at the BER of 10
−15
.
BMST-BCH codes are constructed with overheads ranging from
15% to 25%, exhibiting performances comparable to staircase
codes with similar latencies. The proposed construction is more
flexible to trade off latency against performance, and may
find applications in optical transport networks as an attractive
candidate.
I. INTRODUCTION
In optical communication systems, Bose-Chaudhuri-
Hocquenghem (BCH) codes are often taken as the component
codes to construct forward error correction (FEC) codes with
high rates to achieve very low error probabilities [1]. For
example, with an overhead (OH) of 6.7%, the BCH-BCH
product code with erasures-and-errors decoding is capable of
achieving a net coding gain (NCG) of 9.24 dB at the output bit
error rate (BER) of 10
−15
, as seen from Fig. I.37 in the ITU-T
G.975.1 standard [2]. With a similar overhead, a staircase
code (an elegant extension from a block BCH-BCH product
code to its convolutional counterpart) was proposed in [3]
to achieve an NCG of 9.41 dB at the same BER. Another
attractive advantage is their low-complexity hard-decision
decoding (HDD), which is commonly believed to be the most
feasible decoding to implement for the next-generation 100
Gb/s applications [4]. However, in addition to the inflexibility
with respect to varying frame sizes and overheads, the
construction of staircase codes usually requires a large
amount of calculation for searching good code parameters
either by the extensive software simulations [5] or by density
evolution (DE) analysis [6].
In this paper, we present a new type of convolutional
BCH codes, where short BCH codes are embedded into the
block Markov superposition transmission (BMST) system [7],
resulting in BMST-BCH codes. The construction is flexible
in the sense that any given overhead can be attained with
adjustable frame sizes while keeping the basic hardware un-
changed [8]. Meanwhile, the decoding can be implemented as
a hard-decision sliding-window decoding (SWD) algorithm,
where only binary and/or erasure messages are processed and
passed over a normal graph. To analyze the performance at
an extreme low target BER, a fast simulation approach is
proposed for the component BCH code. This approach allows
us to calculate efficiently both the genie-aided lower bound
and the DE threshold, which coincide with each other in the
error-floor region. Then the genie-aided lower bound, whose
calculation is much simpler than the DE analysis, is taken as
a criterion for code optimization.
Numerical results shows that the performance of BMST-
BCH codes is well predicted by the proposed DE threshold
and genie-aided lower bound. It is shown that BMST-BCH
codes can achieve performances comparable to staircase codes
at the BER of 10
−15
. More distinguishedly, the performance
of BMST-BCH codes can be easily tailored by adjusting the
encoding/decoding delay while keeping unchanged the basic
hardware components of the encoder and decoder.
II. E
NCODING AND DECODING OF BMST-BCH SYSTEM
A. Channel Model
In this paper, we consider binary phase-shift keying (BP-
SK) signalling over additive white Gaussian noise (AWGN)
channels with hard decisions. The channel can be reduced to
binary symmetric erasure channels (BSEC) with input alphabet
F
2
= {0, 1} and output alphabet {0, 1,e}, where the symbol e
represents the bit erasure. Such a channel can be characterized
by a probability vector (p
0
,p
1
,p
e
), where p
0
is the probability
of a bit being correctly transmitted, p
1
is the probability of
bit error and p
e
is the probability of bit erasure. Obviously, a
binary symmetric channel (BSC) is a special case with p
e
=0.
B. Encoding of BMST-BCH System
Let BCH [n, k, d
min
] be a binary systematic BCH code,
where n is the code length, k is the code dimension and
d
min
is the designed distance. By definition, the code rate is
R
k
n
, and the overhead is calculated as
n−k
k
. An erasures-
and-errors decoder is assumed to correct both erasures and
errors. In the case when the number i of occurrences of
errors and the number j of occurrences of erasures satisfy
2i + j<d
min
, the erasures-and-errors decoder outputs the
2017 IEEE International Symposium on Information Theory (ISIT)
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