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Overview of the STM32F10xxx flexible static memory controller AN2784
6/30 Doc ID 14779 Rev 3
Figure 1. FSMC block diagram
From the FSMC point of view, the external memory is divided into four fixed-size banks of
256 Mbytes each, as shown in Figure 2:
● Bank 1 used by the NOR Flash/SRAM controller to address up to 4 memory devices.
This bank is split into 4 regions with 4 dedicated Chip Select signals.
● Banks 2 and 3 used by the NAND Flash/PC Card controller to address NAND Flash
devices.
● Bank 4 used by the NAND Flash/PC Card controller to address a PC Card device.
For each bank, the type of memory to be used is user-defined in the Configuration register.
AHB bus
FSMC interrupt to NVIC
NOR
HCLK
From clock
controller
controller
memory
NAND/PC Card
controller
memory
Configuration
Registers
signals
NAND
signals
Shared
signals
NOR/PSRAM
FSMC_NE[4:1]
FSMC_NL (or NADV)
FSMC_NWAIT
FSMC_A[25:0]
FSMC_D[15:0]
FSMC_NOE
FSMC_NWE
FSMC_NIORD
FSMC_NREG
FSMC_CD
signals
PC Card
ai14718c
FSMC_NBL[1:0]
FSMC_NCE[3:2]
FSMC_INT[3:2]
FSMC_INTR
FSMC_NCE4_1
FSMC_NCE4_2
FSMC_NIOWR
FSMC_NIOS16
FSMC_CLK