MAX5621-MAX5623数字模拟转换器介绍及应用指南

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The MAX5621/MAX5622/MAX5623 are high-performance 16-bit digital-to-analog converters (DACs) that are designed for applications that require a large number of programmable voltages. Featuring 16 sample-and-hold (SHA) outputs, these devices provide precise and accurate analog voltage outputs. With an internal clock oscillator and a sequencer that updates the DAC using codes from an internal SRAM, no external components are needed for operation. These DACs are ideal for a wide range of applications that demand high resolution and high performance. Whether it is in industrial control systems, test and measurement equipment, or audio amplifiers, the MAX5621/MAX5622/MAX5623 deliver exceptional accuracy and reliability. To inquire about pricing, delivery, and ordering information, customers can contact Maxim/Dallas Direct! at 1-888-629-4642 or visit Maxim’s website at www.maxim-ic.com. Learn more about the MAX5621/MAX5622/MAX5623 and discover how these versatile DACs can enhance your application today.

MAX5621/MAX5622/MAX5623

16-Bit DACs with 16-Channel

Sample-and-Hold Outputs

4 _______________________________________________________________________________________

Note 1: The nominal zero-scale (code = 0) voltage is -4.0535V. The nominal full-scale (code = FFFF hex) voltage is +9.0535V. The

output voltage is limited by the Output Range specification, restricting the usable range of DAC codes. The nominal zero-

scale voltage can be achieved when V

< -4.9V, and the nominal full-scale voltage can be achieved when V

> +11.5V.

Note 2: Gain is calculated from measurements:

for voltages V

= 10V and V

= -4V at codes C000 hex and 4F2C hex

for voltages V

= 11.6V and V

= -2.9V at codes FFFF hex and 252E hex

for voltages V

= 9.25V and V

= -5.25V at codes D4F6 hex and 0 hex

for voltages V

= 8.55V and V

= -2.75V at codes C74A hex and 281C hex

Note 3: Steady-state change in any output with an 8V change in an adjacent output.

Note 4: Settling during the first update for an 8V step. The output settles to within the linearity specification on subsequent updates.

Tested with an external sequencer clock frequency of 480kHz.

Note 5: External clock mode with the external clock not toggling.

Note 6: The output voltage is the sum of the DAC output and the voltage at GS. GS gain is measured at 4F2C hex.

Note 7: The sequencer runs at f

SEQ

= f

ECLK

/4. Maximum speed is limited by settling of the DAC and SHAs. Minimum speed is

limited by acceptable droop and update time after a Burst Mode Update.

Note 8: V

rise to CS low = 500µs maximum.

Note 9: Guaranteed by gain-error test.

Note 10: The serial interface is inactive. V

= V

LOGIC

, V

= 0V.

Note 11: The serial interface is active. V

= V

LOGIC

, V

= 0V.

ELECTRICAL CHARACTERISTICS (continued)

= +10V, V

= -4V, V

LOGIC

= V

LDAC

= V

LSHA

= +5V, V

REF

= +2.5V, AGND = DGND = V

= 0V, R

≥ 10MΩ, C

= 50pF,

CLKSEL = +5V, f

ECLK

= 400kHz, T

= T

MIN

to T

MAX

, unless otherwise noted. Typical values are at T

= +25°C.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

SCLK High to CS High Hold Time

CSH1

0ns

DIN to SCLK High Setup Time t

15 ns

DIN to SCLK High Hold Time t

0ns

RST to CS Low (Note 8)

500

µs

POWER SUPPLIES

Positive Supply Voltage V

(Note 9)

8.55

11.60

Negative Supply Voltage V

(Note 9)

-5.25

-4

-2.75

Supply Difference V

- V

(Note 9)

14.5

Logic Supply Voltage

LOGIC

LDAC

LSHA

4.75

5.25

Positive Supply Current I

32 42 mA

Negative Supply Current I

32 40 mA

(Note 10) 1 1.5

Logic Supply Current

LOGIC

SCLK

= 20MHz (Note 11) 2 3

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