AN191
Rev. 1.0 11
The sineWave() function uses the sine[] look-up table
containing 256 signed 8-bit values. The
sine[] value
corresponding to
theta is multiplied by the Volts
variable. The most significant byte of the product stored
in an 8-bit variable. An offset of 0x80 is added to the
output value to provide a sine wave centered about
50%.
Example 6—PWM using High-Speed
Output Mode
The 8-bit PWM mode of the PCA provides sufficient
resolution for most small motor drive applications. The
PWM frequency is normally chosen to be just above the
audible range. The optimum PWM frequency for small
motors is in the range of 16 to 24 kHz. Integral-
Horsepower AC Induction motors often employ lower
switching frequencies to reduce switching losses. The
24 kHz frequency is suitable for most small motor
drives.
The 8-bit PWM frequency can be set to 8, 24, or 96 kHz
when operating from a system clock frequency of
24.5 MHz. An 8-bit PWM frequency of 16.0 or 19.1 kHz
may be obtained by using T0 overflow as the PCA clock
source.
Some applications may require more resolution than 8
bits. Higher resolution may be required to achieve
speed regulation of better than 1% using DC or BLDC
motors. AC Induction motor systems that require
greater than 100 to 1 speed range may also require
higher resolution.
Higher resolutions and arbitrary PWM frequencies can
be obtained by using the high-speed output (HSO)
mode of the programmable counter array to generate a
PWM signal. The HSO mode can be used to generate
PWM waveforms with up to 16-bit resolutions and 40 ns
edge timing. This corresponds to an effective resolution
of 10.25 bits or 0.0816% at 20.0 kHz.
The trade-off is that the software latency limits the
minimum high-time and low-time. The MCU must have
sufficient time to interrupt the current process and write
the new values to the output compare registers before
the next edge is scheduled to occur. The latency can be
minimized by assigning the PCA0 to high priority,
caching the edge timing data, and using an alternate
register set for the interrupt service routine. The CPU
expends a significant portion of its available processing
capability servicing the frequent PCA interrupts.
The software for Example 6 reads the value of the
speed control potentiometer and outputs a 20.0 kHz
PWM waveform on P0.0. The system clock, ADC, and
port initialization are identical to Example 1. The
PCA0_Init() function configures the PCA to use the
system clock and configures Module 0 for high-speed
output mode. The PCA initialization also schedules the
first PCA interrupt.
Two global variables
NextEdge and cycle are used by
the PCA0 Interrupt service routine.
NextEdge is used to
cache the edge timing data one edge ahead of time to
reduce latency. The global bit
cycle is used to keep
track of which edge is to occur next. Since the HSO
mode will toggle the output, a software flag bit is
required. Using a flag bit is more robust than polling the
output pin state because it is independent of compare
matching.
The preprocessor macro LATENCY is set to a value
just greater than the update latency to provide reliable
operation. Preprocessor macro calculations are used to
calculate PERIOD and HTSPAN. The high-time span
HTSPAN is the PERIOD minus two times LATENCY.
The main loop polls the ADC using averaging. The
value from the ADC is multiplied by the desired high-
time span HTSPAN. The product is then incremented
by adding LATENCY. The final result is then stored in a
global variable
HiTime. Temporary variables x and y
are used to calculate the intermediate values. The
scaling operation requires a
long int data type. The
final result is 16-bits. The global variable
HiTime should
not be used for intermediate calculations. The interrupt
service routine might pickup the new value at any time
and would use nonsensical values for the PWM. The
PCA0 interrupt is also temporarily disabled during the
HiTime update to ensure that an interrupt does not
occur until both bytes have been updated.
The PCA interrupt service routine
PCA0_ISR() first
updates the PCA0CPx0 registers and then clears the
PCA0 Module 0 capture/compare flag CCF0. Once the
flag has been cleared, it is safe for the next interrupt to
occur. Depending on the state of the
cycle bit, the
NextEdge is incremented by HiTime or Period minus
HiTime.
A comparison of the HSO PWM is shown versus the 8-
bit PWM in Figure 9. The frequency for the HSO PWM
is exactly 20 kHz and the minimum high time is 1.8 µs.
The frequency for the 8-bit PWM is 24 kHz and the
minimum high-time is 160 ns.