An Efficient Deadlock-Free Adaptive Routing
Algorithm for 3D Network-on-Chips
Jindun Dai
†‡∗
, Xin Jiang
†
, Renjie Li
†
and Takahiro Watanabe
†
†
Graduate School of Information, Production and Systems, Waseda University, Japan
‡
School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, China
∗
Email: jddai@toki.waseda.jp
Abstract—Network-on-Chips (NoC) has been proven as a flex-
ible solution for Chip-Multiprocessor (CMP) systems due to its
reusability and scalability. To increase communication efficiency,
Three-Dimensional Networks-on-Chips (3D NoCs) are developed,
which can shorten the wire length and improve the system
performance. In this paper, we present a novel deadlock-free
adaptive routing algorithm for 3D mesh NoC interconnections.
The routing rules of traditional XY routing and YX routing
are relaxed and used for intra-layer routing. Via multiple
layers, balanced adaptiveness can be achieved. We detail the
basic principle of this method and test its efficiency through
simulations.
I. INTRODUCTION
As the number of transistors on a chip increases, CMP sys-
tem design has become an hot issue in recent years. Traditional
buses and ad-hoc interconnect can no longer effectively fulfil
high communication demands between processors [1]. Hence,
2D NoC has become an effective communication technique
for multi-core systems due to its scalability. However, as
the number of processors increases, the average distance
between processors increases significantly and communication
quality declines. Therefore, how to reduce transmission latency
becomes the bottleneck of 2D NoC.
With the development of 3D Integrated circuits (ICs), mul-
tiple layers are stacked with vertical interconnections between
the layers to improve packing density, noise immunity and
total power consumption [2]. By piling layers of wafer and die
together vertically, 3D NoCs have been developed to shorten
the wire length and reduce system communication latency.
Extending 2D NoC to another dimension opened a new area
of NoC research [3]. For 3D NoCs, topology structure and
routing algorithm are two key factors of system performance.
And designing an efficient routing algorithm is critical for
lower transmission latency and higher throughput. A routing
algorithm is used to determine a path from the source to
the destination. A routing algorithm is either deterministic or
adaptive. In deterministic routing, the paths are predetermined
to deliver packets. The lack of alternative paths makes it hard
to tackle network faults or congestions, thus, performance
degrades in some non-uniform cases.
And many adaptive routing algorithms have been proposed
to deal with 3D NoC problems. Adaptiveness is one of im-
portant metrics of adaptive routing algorithm evaluation. It is
defined as the number of possible paths from the source to the
destination. Alternative paths help to avoid traffic congestion.
However, deadlock avoidance becomes a big challenge while
pursuing adaptiveness as high as possible. In the wormhole
scheme [4], one packet is split into a number of consecutive
flits and these flits are transmitted between processor cores in
pipeline. Therefore, the flits of one packet may span multiple
routers simultaneously [5]. Deadlocks occurs when a group
of packets fail to move on because they are waiting for each
other to release the required channels.
In [6], a fully adaptive routing algorithm named DyXYZ
was proposed. It can provide the maximum adaptiveness and
guarantee deadlock freeness by using 4, 4 and 2 virtual
channels along the x, y and z dimensions, respectively. In [7],
an efficient fully adaptive routing algorithm was presented,
where only 2 virtual channels are used for each direction. It
can avoid inter-layer and intra-layer congestion by considering
local free buffer rate two hops away. Since the fully adaptive
routing can not guarantee deadlock freeness by itself, virtual
channels are required in all cases. However, the usage of
virtual channels results in router area overhead and complex
control logic.
To overcome this overhead, the turn model has become an
attractive solution [8]-[12]. For the turn models, some certain
turns are prohibited under some circumstances so that cycles
never occur in the Channel Dependency Graph (CDG). How-
ever, adaptiveness decreases due to turn restrictions compared
to fully adaptive routing.
The well-known conventional 2D Odd-Even (OE) turn
model was proposed to improve system performance under
non-uniform traffic by Ge-Ming Chiu [8]. Extended from this
2D OE turn model, the conventional 3D OE routing applies
the same rules in all layers and another rule in the vertical
direction. However, adaptiveness is still not distributed evenly
across the network. To achieve better inter-layer network load
balance, Dahir et al. [9] proposed a Balanced Odd-Even
(BOE) turn model, where two complementary rules are used
in different layers. In [10], Complete Odd-Even (COE) turn
model was presented by applying four complementary rules
so that the traffic flow balance could be further improved.
In [11], Masoumeh Ebrahimi et al. introduced Hamilto-
nian path and presented a Hamiltonian-based Fault-tolerant
Routing Algorithm (HamFA). A Hamiltonian path visits each
node in the network exactly once. Through node labeling, the
network is partitioned into two subnetworks and routing takes
place in each subnetwork. In the 3D case, vertical links have