FT232RL：USB转UART接口芯片与安全特性

5星 · 超过95%的资源需积分: 50 48 浏览量更新于2024-07-31 收藏 472KB PDF 举报

"FT232RL是一款由Future Technology Devices International (FTDI)公司推出的USB转UART接口集成电路，集成了时钟发生器输出和FTDI Chip-ID™安全特性。这款芯片在USB到串行UART的设计中简化了许多外部组件，如内部集成的EEPROM、时钟电路和USB电阻。FT232RL相比于其前代产品增加了两个新功能，使其在某些应用领域成为一种‘3合1’的解决方案。" FT232RL芯片是FTDI公司产品线中的最新成员，专门设计用于USB到UART（通用异步接收发送器）的转换。它包含了一个可选择的时钟发生器输出，能够提供6MHz, 12MHz, 24MHz, 和48MHz的时钟频率，这些时钟信号可以被引出到芯片外部，用于驱动微控制器或其他外部逻辑电路。这种内置的时钟发生器显著简化了设计，因为它消除了对额外外部时钟源的需求。此外，FT232RL还引入了FTDI Chip-ID™安全特性，这是一种在制造过程中烧录到设备中的唯一数字。这个独特的ID可以通过USB读取，因此可以作为安全加密狗使用，保护客户的应用程序免受未经授权的访问或复制。这一特性使得FT232RL在需要软件授权或者硬件认证的应用中尤为有价值。该芯片还提供了异步和同步位Bang接口模式，这使得它能适应各种通信协议和应用需求。异步模式适用于标准的串行通信，而同步模式则允许更灵活的数据传输方式，例如I2C、SPI和其他定制的并行协议。在实际应用中，FT232RL广泛应用于嵌入式系统、开发板、模块化电子设备以及需要通过USB进行串行通信的产品中。它的低功耗特性、小型封装以及与多种操作系统（包括Windows、Linux和Mac OS）的兼容性，使其成为工程师们设计USB接口产品的首选之一。 FT232RL芯片以其高度集成、灵活的功能和内置的安全机制，为USB到UART的转换提供了高效且可靠的解决方案。无论是简单的串行通信还是复杂的系统集成，FT232RL都能满足开发人员的多样化需求。

FT232R USB UART I.C. Datasheet Version 1.04 © Future Technology Devices International Ltd. 2005

Page 6

Serial Interface Engine (SIE) - The Serial Interface Engine (SIE) block performs the Parallel to Serial and Serial to

Parallel conversion of the USB data. In accordance to the USB 2.0 speciﬁcation, it performs bit stufﬁng / un-stufﬁng

and CRC5 / CRC16 generation / checking on the USB data stream.

USB Protocol Engine - The USB Protocol Engine manages the data stream from the device USB control endpoint. It

handles the low level USB protocol (Chapter 9) requests generated by the USB host controller and the commands for

controlling the functional parameters of the UART.

FIFO TX Buffer (128 bytes) - Data from the USB data out endpoint is stored in the FIFO TX buffer and removed from

the buffer to the UART transmit register under control of the UART FIFO controller.

FIFO RX Buffer (256 bytes) - Data from the UART receive register is stored in the FIFO RX buffer prior to being

removed by the SIE on a USB request for data from the device data in endpoint.

UART FIFO Controller - The UART FIFO controller handles the transfer of data between the FIFO RX and TX buffers

and the UART transmit and receive registers.

UART Controller with Programmable Signal Inversion and High Drive - Together with the UART FIFO Controller

the UART Controller handles the transfer of data between the FIFO RX and FIFO TX buffers and the UART transmit

and receive registers. It performs asynchronous 7 / 8 bit Parallel to Serial and Serial to Parallel conversion of the

data on the RS232 (RS422 and RS485) interface. Control signals supported by UART mode include RTS, CTS,

DSR , DTR, DCD and RI. The UART Controller also provides a transmitter enable control signal pin option (TXDEN)

to assist with interfacing to RS485 transceivers. RTS / CTS, DSR / DTR and X-On / X-Off handshaking options are

also supported. Handshaking, where required, is handled in hardware to ensure fast response times. The UART also

supports the RS232 BREAK setting and detection conditions. A new feature, programmable in the internal EEPROM

allows the UART signals to each be individually inverted. Another new EEPROM programmable feature allows a high

signal drive strength to be enabled on the UART interface and CBUS pins.

Baud Rate Generator - The Baud Rate Generator provides a x16 clock input to the UART Controller from the 48MHz

reference clock and consists of a 14 bit prescaler and 3 register bits which provide ﬁne tuning of the baud rate

(used to divide by a number plus a fraction or “sub-integer”). This determines the Baud Rate of the UART, which is

programmable from 183 baud to 3 million baud.

The FT232R supports all standard baud rates and non-standard baud rates from 300 Baud up to 3 Megabaud.

Achievable non-standard baud rates are calculated as follows -

Baud Rate = 3000000 / (n + x)

where n can be any integer between 2 and 16,384 ( = 2

) and x can be a sub-integer of the value 0, 0.125, 0.25,

0.375, 0.5, 0.625, 0.75, or 0.875. When n = 1, x = 0, i.e. baud rate divisors with values between 1 and 2 are not

possible.

This gives achievable baud rates in the range 183.1 baud to 3,000,000 baud. When a non-standard baud rate is

required simply pass the required baud rate value to the driver as normal, and the FTDI driver will calculate the

required divisor, and set the baud rate. See FTDI application note AN232B-05 for more details.

RESET Generator - The integrated Reset Generator Cell provides a reliable power-on reset to the device internal

circuitry on power up. A RESET# input pin is provided to allow other devices to reset the FT232R. RESET# can be

tied to VCCIO or left unconnected, unless it is a requirement to reset the device from external logic or an external

reset generator I.C.

Internal EEPROM - The internal EEPROM in the FT232R can be used to store USB Vendor ID (VID), Product ID

(PID), device serial number, product description string, and various other USB conﬁguration descriptors. The internal

EEPROM is also used to conﬁgure the CBUS pin functions. The device is supplied with the internal EEPROM settings

preprogrammed as described in Section 10.

剩余28页未读，继续阅读

SunBird0826

粉丝: 2
资源: 5

FT232RL：USB转UART接口芯片与安全特性

FTDI FT232HL USB TO UART/FIFO/SPI/I2C/JTAG

ft232芯片驱动程序ftdi_ft232_driver

FT232RL数据手册

USB转串口模块232（FT232RL 芯片驱动程序）

FT232RL模块资料

FT232RL中文资料

GP232RL国产USB串口如何兼容FT232RL开发资料

基于FT232RL芯片设计 USB TO RS485 422串口小板硬件(原理图+PCB）工程文件.zip

基于FT232RL芯片实现USB转串口RS232-RS485 三合一评估板硬件（原理图+PCB）程文件.zip

基于FT232RL芯片USB转串口读写控制蓝牙模块BLK-MD-BC04 硬件（原理图+PCB）工程文件.zip

最新资源