6
TPS7B7701-Q1
,
TPS7B7702-Q1
ZHCSDQ2C –JANUARY 2015 –REVISED SEPTEMBER 2018
www.ti.com.cn
Copyright © 2015–2018, Texas Instruments Incorporated
Electrical Characteristics (continued)
at V
I
= 14 V and T
J
= –40º C to +150ºC (unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
(3) The current-limit accuracy is maintained when the current limit is set between 50 mA and 300 mA, and it includes the deviation of the
current-limit threshold voltage V
(LIMx_th)
.
OUTx to SENSEx current ratio accuracy
I
O
= 100 to 300 mA –3% 3%
I
O
= 50 to 100 mA –5% 5%
I
O
= 10 to 50 mA –10% 10%
I
O
= 5 to 10 mA –20% 20%
I
O
/I
LIM
OUTx to LIMx current ratio (I
O
/ I
LIM
) V
I
= 4.5 V to 40 V, 50 mA ≤ I
(LIMx)
≤ 300 mA 198
I
(LIMx)
Programmable current-limit accuracy
(3)
V
I
= 4.5 V to 40 V, 50 mA ≤ I
(LIMx)
≤ 300 mA –8% 8%
I
L(LIMx)
Internal current-limit LIMx shorted to GND 340 550 mA
I
lkg
SENSE, SENSE1, SENSE2, LIM, LIM1,
and LIM2 leakage current
ENx = GND, T
A
= 25°C 2 µA
V
(LIMx_th)
Current-limit threshold voltage
Voltage on the LIM, LIM1, and LIM2 pins when
output current is limited
1.233 V
V
(SENSEx_stb)
Current-sense short-to-battery fault voltage
When short-to-battery or reverse current
conditions are detected
3.05 3.2 3.3 V
V
(SENSEx_tsd)
Current-sense thermal shutdown fault
voltage
When thermal shutdown is detected 2.7 2.85 3 V
V
(SENSEx_cl)
Current-sense current-limit fault voltage When current-limit conditions are detected 2.4 2.55 2.65 V
I
(SENSEx_H)
Current-sense fault condition current
When short-to-battery, reverse current, thermal
shutdown, or current-limit conditions are
detected
3.3 mA
FAULT DETECTION
V
(stb_th)
Short-to-battery threshold V
(OUTx)
– V
I
, checked during turnon sequence –500 –55 110 mV
I
(REV)
Reverse current detection level Power FET on (SW or LDO mode) –100 –40 –1 mA
T
SD
Thermal shutdown Junction temperature 175 °C
T
SD(hys)
Thermal shutdown hysteresis 15 °C
INTERFACE CIRCUITRY
V
OL
ERR output low I
(SINK)
= 5 mA 0.4 V
I
lkg
ERR open-drain leakage current
ERR high impedance, 5-V external voltage is
applied at ERR
1 µA
R
(OUTx-off)
OUT pulldown resistor
(2)
ENx = GND 50 kΩ
I
R(lkg)
Reverse leakage current –40 V < V
I
< 0 V, reverse current to IN 0.6 mA
V
CC
Internal voltage regulator V
I
= 5.5 to 40 V, I
CC
= 0 mA 4.25 4.5 4.75 V
I
CC(lim)
Internal voltage-regulator current-limit 15 70 mA
(1) Design information; specified by design; not production tested.
6.6 Switching Characteristics
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
CURRENT SENSE AND CURRENT-LIMIT
t
d(SENSE_SEL_r)
Current-sense delay time from the rising edge
of SENSE_SEL
(1)
V
(ENx)
≥ 2 V, SENSE_EN = GND,
SENSE_SEL rise from 0 to 5 V
10 µs
t
d(SENSE_SEL_f)
Current-sense delay time from the falling edge
of SENSE_SEL
(1)
V
(ENx)
≥ 2 V, SENSE_EN = GND,
SENSE_SEL fall from 5 to 0 V
10 µs
t
d(SENSE_EN_r)
Current-sense delay time from rising edge of
SENSE_EN
(1)
V
(ENx)
≥ 2 V, SENSE_EN rise from 0 to
5 V
10 µs
t
d(SENSE_EN_f)
Current-sense delay time from falling edge of
SENSE_EN
(1)
V
(ENx)
≥ 2 V, SENSE_EN fall from 5 to
0 V
10 µs
FAULT DETECTION
t
(PD_RC)
Reverse current (Short-to-BAT) shutdown
deglitch time
Delay to shut down the switch or LDO
after a drop over r
on
becomes negative,
I
(OUTx)
= –200 mA (typical), T
A
= 25°C
5 20 µs
t
(BLK_RC)
Reverse current blanking time
Blanking time for reverse-current
detection after power up, the rising
edge of the ENx pin, or the current
limiting event is over
16 ms
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