Research Article
Function Synthesis Algorithm of RTD-Based Universal
Threshold Logic Gate
Maoqun Yao,
1
Kai Yang,
1
Congyuan Xu,
2
and Jizhong Shen
2
1
Hangzhou Institute of Service Engineering, Hangzhou Normal University, Hangzhou 311121, China
2
Department of Information Science & Electronic Engineering, Zhejiang University, Hangzhou 310027, China
Correspondence should be addressed to Maoqun Yao; yaomaoqun@.com
Received March ; Revised May ; Accepted May
Academic Editor: Georgios Sirakoulis
Copyright © Maoqun Yao et al. is is an open access article distributed under the Creative Commons Attribution License,
which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
e resonant tunneling device (RTD) has attracted much attention because of its unique negative dierential resistance
characteristic and its functional versatility and is more suitable for implementing the threshold logic gate. e universal logic
gate has become an important unit circuit of digital circuit design because of its powerful logic function, while the threshold logic
gate is a suitable unit to design the universal logic gate, but the function synthesis algorithm for the -variable logical function
implemented by the RTD-based universal logic gate (UTLG) is relatively decient. In this paper, three-variable threshold functions
are divided into four categories; based on the Reed-Muller expansion, two categories of these are analyzed, and a new decomposition
algorithm of the three-variable nonthreshold functions is proposed. e proposed algorithm is simple and the decomposition results
can be obtained by looking up the decomposition table. en, based on the Reed-Muller algebraic system, the arbitrary -variable
function can be decomposed into three-variable functions, and a function synthesis algorithm for the -variable logical function
implemented by UTLG and XOR is proposed, which is a simple programmable implementation.
1. Introduction
With the improvement in integrated circuit integration, the
complementary metal oxide semiconductor (CMOS) tech-
nology is gradually approaching its physical limitations. e
resonant tunneling device (RTD) has better performance and
features, such as negative dierential resistance characteristic,
self-latching, high speed, and functional versatility [, ]. e
universal logic gate, which has a powerful logic function, has
become an important unit to implement -variable logical
functions [], and the RTD is more suitable for implementing
the universal logic gate because of its negative dierential
resistance characteristic [–]. So, the RTD will probably
become the main electronic device in the next generation of
integrated circuits [, ].
ough the circuit of an -variable logical function
implemented by the universal logic gate will be simpler,
a dierent universal logic gate requires its corresponding
synthesis algorithm to implement a function. Some function
synthesis algorithms have been proposed in the literature [–
], but these algorithms are not suitable for implementing
an arbitrary -variable function by the RTD-based universal
threshold logic gate (UTLG) []. And the algorithm []
which can implement a three-variable nonthreshold function
by UTLGs is relatively complicated, and the implemented
circuit structure is also complicated.
In this paper, based on the Reed-Muller expansion, the
three-variable nonthreshold functions are classied. Two
categories of these are analyzed, and a new decomposition
algorithm of the three-variable nonthreshold functions is
proposed. en a function synthesis algorithm which can
implement an arbitrary -variable logical function by UTLGs
is proposed. e proposed function synthesis algorithm
provides a new scheme for designing integrated circuits by
RTD devices.
2. Background
2.1. reshold Logic. A threshold logic gate is dened as a
logic gate with binary input variables and a single binary
output. Its internal parameters are as follows: binary input
Hindawi Publishing Corporation
Journal of Applied Mathematics
Volume 2015, Article ID 827572, 7 pages
http://dx.doi.org/10.1155/2015/827572