Electrical Characteristics (Continued)
vices, T
JMAX
= 125˚C. The typical thermal resistances (θ
JA
) of these parts when board mounted follow: ADC08031 and ADC08032 with BIN and CIN suffixes
120˚C/W, ADC08038 with CIN suffix 80˚C/W. ADC08031 with CIWM suffix 140˚C/W, ADC08032 140˚C/W, ADC08034 140˚C/W, ADC08038 with CIWM suffix 91˚C/W.
Note 6: Human body model, 100 pF capacitor discharged through a 1.5 kΩ resistor.
Note 7: See AN450 “Surface Mounting Methods and Their Effect on Product Reliability” or Linear Data Book section “Surface Mount” for other methods of soldering
surface mount devices.
Note 8: Typicals are at T
J
= 25˚C and represent the most likely parametric norm.
Note 9: Guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 10: Total unadjusted error includes offset, full-scale, linearity, multiplexer.
Note 11: Cannot be tested for the ADC08032.
Note 12: For V
IN(−)
≥ V
IN(+)
the digital code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Block Diagram) which will forward-conduct for
analog input voltages one diode drop below ground or one diode drop greater than V
CC
supply. During testing at low V
CC
levels (e.g., 4.5V), high level analog inputs
(e.g., 5V) can cause an input diode to conduct, especially at elevated temperatures, which will cause errors for analog inputs near full-scale. The spec allows 50 mV
forward bias of either diode; this means that as long as the analog V
IN
does not exceed the supply voltage by more than 50 mV, the output code will be correct. Ex-
ceeding this range on an unselected channel will corrupt the reading of a selected channel. Achievement of an absolute 0 V
DC
to5V
DC
input voltage range will there-
fore require a minimum supply voltage of 4.950 V
DC
over temperature variations, initial tolerance and loading.
Note 13: Channel leakage current is measured after a single-ended channel is selected and the clock is turned off. For off channel leakage current the following two
cases are considered: one, with the selected channel tied high (5 V
DC
) and the remaining seven off channels tied low (0 V
DC
), total current flow through the off chan-
nels is measured; two, with the selected channel tied low and the off channels tied high, total current flow through the off channels is again measured. The two cases
considered for determining on channel leakage current are the same except total current flow through the selected channel is measured.
Note 14: A 40% to 60% duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these limits
the minimum time the clock is high or low must be at least 450 ns. The maximum time the clock can be high or low is 100 µs.
Note 15: Since data, MSB first, is the output of the comparator used in the successive approximation loop, an additional delay is built in (see Block Diagram) to allow
for comparator response time.
Note 16: For the ADC08032 V
REF
IN is internally tied to V
CC
, therefore, for the ADC08032 reference current is included in the supply current.
Typical Performance Characteristics
Linearity Error vs
Reference Voltage
DS010555-32
Linearity Error vs
Temperature
DS010555-33
Linearity Error vs
Clock Frequency
DS010555-34
Power Supply Current vs
Temperature (ADC08038,
ADC08034, ADC08031)
DS010555-35
Note: For ADC08032 add I
REF
Output Current vs
Temperature
DS010555-36
Power Supply Current
vs Clock Frequency
DS010555-37
ADC08031/ADC08032/ADC08034/ADC08038
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