TABLE 2. I
2
S DIGITAL INPUT/OUTPUT CHARACTERISTICS
DIGITAL INPUT
Input Voltage High (V
IH
) L/R, WS, SCK 0.7 x V
DD
V
DD
V 1
Input Voltage Low (V
IL
) L/R, WS, SCK 0 0.25 x V
DD
V 1
SD DIGITAL INPUT
Voltage Output Low (VOL) VDD = 1.8 V, I
SINK
= 0.25 mA 0.1 × V
DD
Voltage Output Low (VOL) VDD = 1.8 V, I
SINK
= 0.7 mA 0.3 × V
DD
Voltage Output High (VOH) VDD = 1.8 V, I
= 0.7 mA
0.7 × V
DD
V 1
Voltage Output High (VOH)
VDD = 1.8 V, I
SINK
= 0.25 mA
Voltage Output Low (VOL) VDD = 3.3 V, I
SINK
= 0.5 mA
DD
V 1
Voltage Output Low (VOL) VDD = 3.3 V,
ISINK
= 1.7 mA
DD
V 1
Voltage Output High (VOH) VDD = 3.3 V, I
SINK
= 1.7 mA
DD
V 1
Voltage Output High (VOH) VDD = 3.3 V, I
SINK
= 0.5 mA
DD
V 1
Note 1: Limits based on characterization results; not production tested.
TABLE 3. SERIAL DATA PORT TIMING SPECIFICATIONS
t
SCH
SCK high 50
ns
t
SCL
SCP
SCK
3.2
t
WSS
t
WSH
f
WS
50
TIMING DIAGRAM
Figure 1. Serial Data Port Timing
SCK
WS
SD
t
SCP
t
SCH
t
SCL
t
WSH
t
WSS
Page 5 of 21
Document Number: DS-INMP441-00
Revision: 1.1