FlexRay V2.1协议第8章：时钟同步详解

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FlexRay通信系统协议规范V2.1修订本A，详细阐述了第八章——时钟同步。在分布式通信系统中，每个节点都有独立的时钟，但因为温度变化、电压波动以及时间源（如振荡器）的制造公差，即使初始时所有节点的时间基线是同步的，它们也会随着时间逐渐产生偏差。这一章节对于理解网络中保持精确时间同步的重要性至关重要。 8.1节介绍时钟同步的基本概念，指出由于硬件环境的不确定性，确保节点间的时间一致性是通信稳定性的基础。图8-1展示了时钟同步的上下文，涉及帧和符号处理、媒体访问控制、时钟同步的启动过程、宏周期生成、以及不同通道（如Channel A 和 Channel B）的特定处理流程。时钟同步的核心任务包括： 1. **帧和符号处理**：节点在接收和发送数据时，必须准确地识别帧的边界和符号序列，这依赖于稳定的时钟参考。 2. **媒体访问控制**：在多节点共享通信介质时，良好的时钟同步有助于防止数据碰撞和提高整体网络效率。 3. **启动时钟同步**：当系统启动或节点加入网络时，需要通过特定的机制来同步各个节点的时钟，这通常涉及到一个初始化过程。 4. **宏周期生成**：为了协调节点间的通信，FlexRay协议规定了统一的宏周期（macro-tick），这要求所有节点根据相同的时钟频率进行操作。 5. **从/到主机接口**：与主机或其他外部系统的交互也需要基于准确的时间同步，以便正确解读和发送数据。 6. **编码/解码过程**：在FlexRay的传输过程中，编码和解码步骤也依赖于精确的时间对齐，以确保信息的正确性和完整性。 7. **通道A和B的独立同步**：每个通道可能有自己的时钟同步策略，如Channel A 和 Channel B，它们在各自的帧处理、媒体访问控制和启动阶段都需要独立管理。 FlexRay V2.1修订本的时钟同步章节深入探讨了如何在分布式环境中保持各节点间时间的一致性，这对于确保通信的可靠性和实时性至关重要，尤其是在高精度、低延迟的应用场景中。理解并实现有效的时钟同步机制是使用FlexRay通信系统的关键要素。

FlexRay Protocol Specification

Version 2.1 Revision A 15-December-2005

Chapter 8: Clock Synchronization

Page 173 of 245

communication cycle. Although the SDL indicates that this computation cannot begin before the

NIT, an implementation may start the computation of this parameter within the dynamic segment or

symbol window as long as the reaction to the computation (update of the CHI and transmission of

the SyncCalcResult and offset calc ready signals) is delayed until the NIT. The calculation must be

complete before the offset correction phase begins.

• Rate (frequency) changes are described by the variable vRateCorrection. vRateCorrection is an

integer number of microticks that are added to the configured number of microticks in a communica-

tion cycle (pMicroPerCycle)

. vRateCorrection may be negative. The value of vRateCorrection is

determined by the clock synchronization algorithm and is only computed once per double cycle. The

calculation of vRateCorrection takes place following the static segment in an odd cycle. The calcula-

tion of vRateCorrection is based on the values measured in an even-odd double cycle. Although the

SDL indicates that this computation cannot begin before the NIT, an implementation may start the

computation of this parameter within the dynamic segment or symbol window as long as the

reaction to the computation (update of the CHI and transmission of the SyncCalcResult and rate

calc ready signals) is delayed until the NIT. The calculation must be completed before the next even

cycle begins.

The following data types will be used in the definition of the clock synchronization process:

newtype T_EvenOdd

literals even, odd;

endnewtype;

syntype

T_Deviation = T_Microtick

endsyntype;

Definition 8-2: Formal definition of T_EvenOdd and T_Deviation.

The protocol operation control (POC) process sets the operating mode for the clock synchronization

process (CSP) (Figure 8-4) into one of the following modes:

1. In the STANDBY mode the clock synchronization process is effectively halted.

2. In the NOSYNC mode CSP performs clock synchronization under the assumption that it is not trans-

mitting sync frames (i.e., it does not include its own clock in the clock correction computations).

3. In the SYNC mode CSP performs clock synchronization under the assumption that it is transmitting

sync frames (i.e., it includes its own clock in the clock correction computations).

Definition 8-3 gives the formal definition of the CSP operating modes.

newtype T_CspMode

literals STANDBY, NOSYNC, SYNC;

endnewtype;

newtype T_SyncCalcResult

literals WITHIN_BOUNDS, EXCEEDS_BOUNDS, MISSING_TERM;

endnewtype;

Definition 8-3: Formal definition of T_CspMode and T_SyncCalcResult.

After the POC sets the CSP mode to something other than STANDBY, the CSP waits in the CSP:wait for

startup state until the POC forces the node to a cold start or to integrate into a cluster. The startup

procedure, including its initialization and interaction with other processes, is described in the macro

INTEGRATION CONTROL, which is explained in section 8.4.

Before further explanation of the processes an array is defined (Definition 8-4) which is used to store the

frame IDs of the received sync frames.

pMicroPerCycle is the configured number of microticks per communication cycle without correction.

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