2 Copyright © 1996 IEEE All Rights Reserved
IEEE Std 1596.3-1996 IEEE STANDARD FOR LOW-VOLTAGE
1.3 Strategies
The basic design strategies selected by this standard include the following:
Low-voltage swing. To minimize power dissipation and enable operation at very high-speed, low-swing
(400 mV maximum) signals are specified.
Differential signals. Small signal swings require differential signaling for adequate noise margin in practical
systems.
Self-terminated. To minimize board real estate and costs, and to maximize clock rates, each receiver is
assumed to provide its own termination resistors.
Uniform ground. The standard assumes that the ground potential difference between driver and receiver is
kept small by the system design. The mechanism for constraining the ground potential difference is beyond
the scope of this standard.
The most controversial decision was to use differential signals, which at first appears to double the number of signal
lines. The pin-count overhead is actually much less than this, since reliable single-ended schemes require many more
ground signals (many high-speed chips and/or backplanes provide one ground for every two signal pins) and run
significantly slower. Other design benefits associated with differential signals include the following:
Constant driver current. The transmitter consumes a (near) constant current when driving the links; the
current remains the same, but is routed in the opposite direction when the signal value changes. This
simplifies the design of power-distribution wiring.
Constant link current. The net signaling current in a differential link is (nearly) constant, which greatly
simplifies system design. The links are unidirectional and transmitters always drive a differential signal per
table 2–1 or table 2–2. Reversing or stopping links would cause the net common-mode signaling current to
change, creating system noise.
Low power. A low signal current can be used, since much of the induced noise and ground-bounce appears as
a common-mode signal.
Simple board design. Although differential signals must be carefully routed on adjacent matched tracks, they
are usually less sensitive to imperfections in the transmission line environment.
Low EMI. Differential signals minimize the area between the signal and the return path. In addition, the equal
and opposite currents create canceling electromagnetic fields. This dramatically reduces the electromagnetic
emissions.
Low susceptibility to externally generated noise. Though these links generate little noise, other parts of the
system may. Differential signals are relatively immune to this noise.
1.4 Design models
1.4.1 Source-synchronous data
The SCI-LVDS link model assumes unidirectional operation (the driver always at one end of the link, the receiver at
the other), and that a clock signal is sent along with the data as though it is just another data bit.
Both edges of the clock are used to delimit data, so the maximum transition rate of the clock is the same as the
maximum transition rate of the data signals. This clock flows through the link at the same velocity as the data, and is
to be used as the time reference for sampling the data.
In most applications, the received sampled data will need to be synchronized to the receiver’s local clock. If the
transmitter’s clock and the receiver's clock are independent, and thus perhaps at slightly different frequencies,
occasional symbols will need to be inserted or removed from time to time in an elasticity buffer in order to maintain
synchronization.
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