TLC1543系列10位A/D转换器：高速接口与多功能特性

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TLC1543系列是一组由CMOS技术制成的10位开关电容逐次逼近型模拟到数字转换器（ADC），包括TLC1542C、TLC1542I、TLC1542M、TLC1542Q、TLC1543C、TLC1543I和TLC1543Q型号。这些设备的主要特点是： 1. 高分辨率与10位精度：每个设备具有10位的分辨率，这意味着它能够提供非常精确的模拟信号数字化，每一路输入的最大误差仅为满量程的±1LSB（least significant bit）。 2. 4线接口：它们拥有一个3状态输出，包括芯片选择（CS）、输入输出时钟（I/O CLOCK）、地址输入（ADDRESS）和数据输出（DATA OUT），这使得它们可以直接通过串行接口与主机处理器通信，实现高效的数据传输。 3. 多功能性：除了高速A/D转换功能外，TLC1543系列还配备了14通道内置多路复用器，可以灵活地选择11个模拟输入中的任意一个，或者选择三个内部自检电压，提供了丰富的控制选项。 4. 自动采样保持功能：内置的自动采样保持电路确保在转换期间信号保持稳定，提高了转换的准确性和可靠性。 5. 低误差与一致性：采用开关电容设计，即使在工作温度范围内变化，也能保证低误差的转换性能。 6. 集成系统时钟：设备内部集成时钟减少了外部时钟的需求，简化了系统设计。 7. 结束转换输出（EOC）：当转换完成时，EOC输出会变为高电平，通知主机处理器转换已完成，便于进一步处理。 8. 兼容性：TLC1543系列与TLC542等其他设备的终端兼容，方便系统集成。 9. CMOS技术：这些ADC采用了CMOS工艺，提供低功耗、高集成度和抗干扰性能。 TLC1543系列是一款功能强大、灵活性高的模拟信号处理组件，适用于对速度、精度和控制要求较高的应用环境，如工业自动化、仪表设备和数据采集系统等。其设计考虑到了各种实际应用场景的需求，为工程师提供了高效且稳定的信号转换解决方案。

TLC1542C, TLC1542I, TLC1542M, TLC1542Q, TLC1543C, TLC1543I, TLC1543Q

10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH

SERIAL CONTROL AND 11 ANALOG INPUTS

SLAS052E – MARCH 1992 – OCTOBER 1998

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

analog inputs and test modes (continued)

Table 2. Analog-Channel-Select Address

ANALOG INPUT

SELECTED

VALUE SHIFTED INTO

ADDRESS INPUT

SELECTED

BINARY HEX

A0 0000 0

A1 0001 1

A2 0010 2

A3 0011 3

A4 0100 4

A5 0101 5

A6 0110 6

A7 0111 7

A8 1000 8

A9 1001 9

A10 1010 A

Table 3. Test-Mode-Select Address

INTERNAL

SELF-TEST

VOLTAGE

VALUE SHIFTED INTO

ADDRESS INPUT

OUTPUT RESULT

(

HEX

)

‡

VOLTAGE

SELECTED

†

BINARY HEX

OUTPUT

RESULT

(HEX)

‡

ref+

– V

ref–

1011 B 200

ref–

1100 C 000

ref+

1101 D 3FF

†

ref+

is the voltage applied to the REF+ input, and V

ref–

is the voltage applied to the REF–

input.

‡

The output results shown are the ideal values and vary with the reference stability and

with internal offsets.

converter and analog input

The CMOS threshold detector in the successive-approximation conversion system determines each bit by

examining the charge on a series of binary-weighted capacitors (see Figure 1). In the first phase of the

conversion process, the analog input is sampled by closing the S

switch and all S

switches simultaneously.

This action charges all the capacitors to the input voltage.

In the next phase of the conversion process, all S

and S

switches are opened and the threshold detector

begins identifying bits by identifying the charge (voltage) on each capacitor relative to the reference (REF–)

voltage. In the switching sequence, ten capacitors are examined separately until all ten bits are identified and

then the charge-convert sequence is repeated. In the first step of the conversion phase, the threshold detector

looks at the first capacitor (weight = 512). Node 512 of this capacitor is switched to the REF+ voltage, and the

equivalent nodes of all the other capacitors on the ladder are switched to REF–. If the voltage at the summing

node is greater than the trip point of the threshold detector (approximately one-half V

), a 0 bit is placed in

the output register and the 512-weight capacitor is switched to REF–. If the voltage at the summing node is less

than the trip point of the threshold detector, a 1 bit is placed in the register and the 512-weight capacitor remains

connected to REF+ through the remainder of the successive-approximation process. The process is repeated

for the 256-weight capacitor, the 128-weight capacitor, and so forth down the line until all bits are counted.

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