TLV320AIC3110：低功耗音频编解码器与立体声Class-D扬声器放大器

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"TLV320AIC3110是一款低功耗音频编解码器，具有音频处理功能和立体声Class-D扬声器放大器。该芯片由TI（德州仪器）生产，并提供PDF数据表详细说明其特性和功能。" **TLV320AIC3110主要特性** 1. **集成锁相环(PLL)**: 这个特性允许用户编程设置数字音频处理器的时钟，以适应不同采样率的需求，从而支持广泛的音频应用。 2. **高信噪比的立体声音频DAC**: 提供95dB的信噪比，意味着它能提供高质量的模拟音频输出，减少了噪声和失真。 3. **单声道音频ADC**: 具有91dB的信噪比，确保了输入音频信号的高保真度。 4. **多种音频接口**: 包括I2S、左对齐、右对齐、DSP和TDM接口，这使得TLV320AIC3110能够灵活地与各种数字音频系统兼容。 5. **I2C控制与寄存器自动增量**: 这简化了芯片的配置和管理，可以通过I2C总线进行编程，同时寄存器自动增量功能降低了软件复杂性。 6. **立体声1.29-W Class-D BTL 8-Ω扬声器驱动器**: 使用Class-D技术，提供高效且高功率的音频输出，适用于小型便携式设备。 7. **全面的电源管理**: 支持不同的电源供电，包括模拟电源（2.7V-3.6V）、数字核心电源（1.65V-1.95V）以及数字I/O电源（1.1V-3.6V）。 8. **麦克风功能**: 集成了麦克风偏置、前置放大器PGA和自动增益控制(AGC)，提高了麦克风输入信号的质量和稳定性。 9. **内置数字音频处理块(PRB)**: 包含可编程的二阶滤波器、FIR滤波器和动态范围压缩(DRC)，允许用户根据需要定制音频处理。 10. **小尺寸封装**: 采用5mm x 5mm的32-QFN封装，适合空间有限的设计。 **应用场景** - 移动设备：如智能手机和平板电脑，由于其低功耗和小巧的封装，非常适合集成在这些产品中。 - 便携式音频播放器：高信噪比的DAC和音频处理能力可以提供优质的音乐体验。 - 无线耳机和扬声器：Class-D放大器能提供高效率的音频输出，适用于电池供电的设备。 - 智能家居设备：如智能音箱，可以利用其丰富的音频接口和处理能力来接收和播放各种音频源。 - 教育和会议系统：内置的麦克风处理功能使得语音清晰度得以提升，适用于远程学习和在线会议。 TLV320AIC3110是一款高度集成的音频编解码器，适用于需要高质量音频处理和高效扬声器驱动的各类应用。其丰富的功能集和灵活的接口选择，使其成为设计者在开发音频系统时的理想选择。

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0.0 0.5 1.0 1.5 2.0

G014

THD+N − Total Harmonic Distortion + Noise − dB

− Output Power − W

Driver Gain

= 6 dB

Driver Gain

= 12 dB

AVDD = HPVDD = 3.3 V

IOVDD = 3.3 V

SPLVDD = 5.5 V

DVDD = 1.8 V

= 8 Ω

Driver Gain

= 24 dB

Driver Gain

= 18 dB

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0.0 0.5 1.0 1.5 2.0

G015

THD+N − Total Harmonic Distortion + Noise − dB

− Output Power − W

AVDD = 3.3 V

HPVDD = 3.3 V

IOVDD = 3.3 V

DVDD = 1.8 V

Gain = 18 dB

= 8 Ω

SPLVDD = 5.5 V

SPLVDD = 4.3 V

SPLVDD = 3.3 V

SPLVDD = 3.6 V

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0.00 0.02 0.04 0.06 0.08 0.10 0.12 0.14

G025

THD+N − Total Harmonic Distortion + Noise − dB

− Output Power − W

HPVDD = 3.3 V

CM = 1.65 V

HPVDD = 3.6 V

CM = 1.8 V

HPVDD = 3 V

CM = 1.5 V

HPVDD = 2.7 V

CM = 1.35 V

IOVDD = 3.3 V

DVDD = 1.8 V

Gain = 9 dB

= 16 Ω

TLV320AIC3110

SLAS647B –DECEMBER 2009–REVISED MAY 2012

www.ti.com

TOTAL HARMONIC DISTORTION + NOISE

OUTPUT POWER

Figure 4-9. Headphone Output Power

4.3 Class-D Speaker Driver Performance

TOTAL HARMONIC DISTORTION + NOISE TOTAL HARMONIC DISTORTION + NOISE

vs vs

OUTPUT POWER OUTPUT POWER

Figure 4-10. Max Class-D Speaker-Driver Output Power Figure 4-11. Class-D Speaker-Driver Output Power

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Product Folder Links: TLV320AIC3110

TLV320AIC3110

www.ti.com

SLAS647B –DECEMBER 2009–REVISED MAY 2012

• Digital audio processing blocks (PRB) for play and record paths

• AGC and DRC

• Digital sine-wave generator for beeps

• Stereo headphone/lineout amplifier

• Class-D stereo amplifier for 8-Ω speakers

• Pin-controlled or register-controlled volume level

• Power-down de-pop and power-up soft start

• Analog inputs

• I

C control interface

• Power-down control block

Following a toggle of the RESET pin or a software reset, the device operates in the default mode. The I

interface is used to write to the control registers to configure the device.

The I

C address assigned to the TLV320AIC3110 is 001 1000. This device always operates in an I

slave mode. All registers are 8-bit, and all writable registers have read-back capability. The device auto-

increments to support sequential addressing and can be used with I

C fast mode. Once the device is

reset, all appropriate registers are updated by the host processor to configure the device as needed by the

user.

5.2.1 Device Initialization

5.2.1.1 Reset

The TLV320AIC3110 internal logic must be initialized to a known condition for proper device function. To

initialize the device to its default operating condition, the hardware reset pin (RESET) must be pulled low

for at least 10 ns. For this initialization to work, both the IOVDD and DVDD supplies must be powered up.

It is recommended that while the DVDD supply is being powered up, the RESET pin be pulled low.

The device can also be reset via software reset. Writing a 1 into page 0 / register 1, bit D0 resets the

device.

5.2.1.2 Device Start-Up Lockout Times

After the TLV320AIC3110 is initialized through hardware reset at power up or software reset, the internal

memories are initialized to default values. This initialization takes place within 1 ms after pulling the

RESET signal high. During this initialization phase, no register-read or register-write operation should be

performed on ADC or DAC coefficient buffers. Also, no block within the codec should be powered up

during the initialization phase.

5.2.1.3 PLL Start-Up

Whenever the PLL is powered up, a start-up delay of approximately of 10 ms occurs after the power-up

command of the PLL and before the clocks are available to the codec. This delay is to ensure stable

operation of the PLL and clock-divider logic.

5.2.1.4 Power-Stage Reset

The power-stage-only reset is used to reset the device after an overcurrent latching shutdown has

occurred. Using this reset re-enables the output stage without resetting all of the registers in the device.

Each of the four power stages has its own dedicated reset bit. The headphone power-stage reset is

performed by setting page 1 / register 31, bit D7 for HPL and by setting page 1 / register 31, bit D6 for

HPR. The speaker power-stage reset is performed by setting page 1 / register 32, bit D7 for SPLP and

SPLM, and by setting page 1 / register 32, bit D6 for SPRP and SPRM.

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Product Folder Links: TLV320AIC3110

TLV320AIC3110

SLAS647B –DECEMBER 2009–REVISED MAY 2012

www.ti.com

5.2.1.5 Software Power Down

By default, all circuit blocks are powered down following a reset condition. Hardware power up of each

circuit block can be controlled by writing to the appropriate control register. This approach allows the

lowest power-supply current for the functionality required. However, when a block is powered down, all of

the register settings are maintained as long as power is still being applied to the device.

5.2.2 Audio Analog I/O

The TLV320AIC3110 has a stereo audio DAC and a monaural ADC. It supports a wide range of analog

interfaces to support different headsets and analog outputs. The TLV320AIC3110 has features to interface

output drivers (8-Ω, 16-Ω, 32-Ω) and a microphone PGA with AGC control. A special circuit has also been

included in the TLV320AIC3110 to insert a short key-click sound into the stereo audio output. The key-

click sound is used to provide feedback to the user when a particular button is pressed or item is selected.

The specific sound of the keyclick can be adjusted by varying several register bits that control its

frequency, duration, and amplitude. See Key-Click Functionality With Digital Sine-Wave Generator

(PRB_P25), Section 5.5.5.

5.3 Digital Processing Low-Power Modes

The TLV320AIC3110 device can be tuned to minimize power dissipation, to maximize performance, or to

an operating point between the two extremes to best fit the application. The choice of processing blocks,

PRB_P1 to PRB_P25 for stereo playback and PRB_R4 to PRB_R18 for mono recording, also influences

the power consumption. In fact, the numerous processing blocks have been implemented to offer a choice

among configurations having a different balance of power-optimization and signal-processing capabilities.

5.3.1 ADC, Mono, 48 kHz, DVDD = 1.8 V, AVDD = 3.3 V

AOSR = 128, Processing Block = PRB_R4 (Decimation Filter A)

Power consumption = 9.01 mW

Table 5-1. PRB_R4 Alternative Processing Blocks, 9.01 mW

Processing Block Filter Estimated Power Change (mW)

PRB_R5 A 0.23

PRB_R6 A 0.22

AOSR = 64, Processing Block = PRB_R11 (Decimation Filter B)

Power consumption = 7.99 mW

Table 5-2. PRB_R11 Alternative Processing Blocks, 7.99 mW

Processing Block Filter Estimated Power Change (mW)

PRB_R4 A 0.43

PRB_R5 A 0.67

PRB_R6 A 0.66

PRB_R10 B –0.14

PRB_R12 B 0.04

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Product Folder Links: TLV320AIC3110

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