博通BCM43362单芯片802.11 b/g/n无线解决方案

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标题"BCM43362datasheet"介绍了博通公司的一款高度集成的单芯片无线解决方案——BCM43362，该芯片专为移动和手持设备设计，旨在提供IEEE 802.11b/g/n标准的无线连接功能。这款芯片集成了MAC（Media Access Control）、基带以及射频模块，支持2.4GHz IEEE 802.11标准，并内置一个符合大多数手持设备功率需求的2.4GHz WLAN CMOS功率放大器，以确保无线信号的输出强度。 BCM43362的特点包括： 1. 高度集成：作为一个单芯片解决方案，它显著减少了系统设计的复杂性和成本，对于移动设备制造商来说，这有助于简化产品开发流程并降低总体成本。 2. 多种接口选项：芯片提供了SDIO v2.0接口，支持4线或1线模式，以及通用gSPI模式，以适应不同的主机系统接口需求。 3. 功耗优化：通过先进的设计技术和制造工艺，BCM43362在活跃模式和待机模式下都能有效降低能耗，特别适合那些对功耗敏感、追求低功耗的移动设备，如智能手机、平板电脑等。 4. 功能扩展性：除了内置功率放大器，它还支持外部低噪声放大器（LNA）和功率放大器，以满足不同应用场景下的性能要求。 5. 符合标准：遵循IEEE 802.11b/g/n规范，确保了兼容性和互操作性，适用于无线局域网（WLAN）应用，如Wi-Fi网络连接。 BCM43362是一款面向移动设备的高效、节能且灵活的无线通信解决方案，是构建现代便携式电子设备无线连接的核心组件。它的特性使得它在便携性、性能和能效之间找到了良好的平衡，对于提升设备的整体用户体验具有重要意义。

3/22/2011 MULD2

Voltage Regulators

BROADCOM IEEE 802.11 b/g/n MAC/Baseband/Radio + SDIO

February 17, 2011 • 43362-DS101-R Page 14

BCM43362 Advance Data Sheet

Voltage Regulators

All BCM43362 regulator output voltages are PMU programmable and have the following nominal capabilities.

The currents listed below indicate regulator capabilities. See “System Power Consumption” on page 72 for the

actual expected loads.

• Core Buck switching regulator (CBUCK): 2.3–5.5V input, nominal 1.5V output (up to 500 mA).

• LDO3P3: 2.3–5.5V input, nominal 3.3V output (up to 40 mA)

• CLDO (for the core): 1.45–2.0V input, nominal 1.2V output (up to 150 mA)

• Low-noise LNLDO1: 1.45–2.0V input, nominal 1.2V output (up to 150 mA)

See “Internal Regulator Electrical Specifications” on page 66 for full regulator specifications.

PMU Sequencing

The WLAN PMU sequencer is responsible for minimizing system power consumption. It enables and disables

various system resources based on a computation of the required resources and a table that describes the

relationship between resources and the time needed to enable and disable them. Resource requests come

from several sources: clock requests from cores, the minimum resources defined in the ResourceMin register,

and the resources requested by any active resource request timers. The PMU sequencer maps clock requests

into a set of resources required to produce the requested clocks.

Each resource is in one of four states: enabled, disabled, transition_on, and transition_off. Each resource has

a timer that contains 0 when the resource is enabled or disabled and a nonzero value in the transition states.

The timer is loaded with the resource's time_on or time_off value when the PMU determines that the resource

must be enabled or disabled. That timer decrements on each LPO sleep clock. When it reaches 0, the state

changes from transition_off to disabled or transition_on to enabled. If the time_on value is 0, the resource can

go immediately from disabled to enabled. Similarly, a time_off value of 0 indicates that the resource can go

immediately from enabled to disabled. The terms enable sequence and disable sequence refer to either the

immediate transition or the timer load-decrement sequence.

During each clock cycle, the PMU sequencer performs the following actions:

1. Computes the required resource set based on requests and the resource dependency table.

2. Decrements all timers whose values are nonzero. If a timer reaches 0, the PMU clears the ResourcePending

bit for the resource and inverts the ResourceState bit.

3. Compares the request with the current resource status and determines which resources must be enabled

or disabled.

4. Initiates a disable sequence for each resource that is enabled, no longer being requested, and has no

powered-up dependents.

5. Initiates an enable sequence for each resource that is disabled, is being requested, and has all of its

dependencies enabled.

3/22/2011 MULD2

Low-Power Shutdown

BROADCOM IEEE 802.11 b/g/n MAC/Baseband/Radio + SDIO

February 17, 2011 • 43362-DS101-R Page 15

BCM43362 Advance Data Sheet

Low-Power Shutdown

The BCM43362 provides a low-power shutdown feature that allows the device to be turned off while the host,

and any other device in the system, remain operational. When the WLAN is not needed, the WLAN core can be

put in reset by deasserting WL_RST_N (logic hi). VDDIO_RF and VDDIO remain powered while VIO and VBAT

are both present, allowing the BCM43362 to be effectively off while keeping the I/O pins powered. During a

low-power shut-down state, provided VIO continues to be supplied to the BCM43362, most outputs are

tristated and most inputs are disabled. Input voltages must remain within the limits defined for normal

operation. This is done to prevent current paths or create loading on any digital signals in the system, enabling

the BCM43362 to be a fully integrated embedded device that takes full advantage of the lowest power-saving

modes.

Two signals on the BCM43362, the system clock input (OSCIN) and sleep clock input (EXT_SLEEP_CLK), are

designed to be high-impedance inputs that do not load down the driving signal even if the BCM43362 does not

have VDDIO power applied to it. When the BCM43362 is powered on from this state, it is the same as a normal

power-up, and the device does not contain any information about its state from before it was powered down.

CBUCK Regulator Features

The CBUCK regulator has several features that help make the BCM43362 ideal for mobile devices. First, the

regulator uses 3.2 MHz as its PWM switching frequency for Buck regulation. This high frequency allows the use

of small passive components for the switcher's external circuit, thereby saving PCB space in the design. In

addition, the CBUCK regulator has three modes of operation: PWM mode for low-ripple output and for fast

transient response and extended load ranges, Burst Mode for lower currents, and Low Power Burst Mode for

higher efficiency when the load current is very low (Low Power Burst mode is not available for external

devices).

The CBUCK supports external SMPS request to allow flexibility of supplying 1.8V to BCM43362, BCM2076, and

other external devices when EXT_SMPS_REQ is asserted high. It also supports low ripple PWM mode (7 mVpp

typical) for noise-sensitive applications when EXT_PWM_REQ is asserted high. A 100 μs wait/settling time from

the assertion of EXT_PWM_REQ high before increasing the load current allows the internal integrator

precharging to complete. This is not a requirement, but is preferred.

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