LMH0036
SNLS254B –MARCH 2008–REVISED APRIL 2013
www.ti.com
PIN DESCRIPTIONS
Pin Name Description
1 SDI0 Data Input 0 True.
2 SDI0 Data Input 0 Complement.
4 SDI1 Data Input 1 True.
5 SDI1 Data Input 1 Complement
7 SDI2 Data Input 2 True.
8 SDI2 Data Input 2 Complement.
10 SDI3 Data Input 3 True.
11 SDI3 Data Input 3 Complement.
Bypass/Auto Bypass mode select. Bypasses reclocking when high. This pin has an internal
15 BYPASS/AUTO BYPASS pulldown.
Data and Clock Output Mute input. Mutes the output when low. This pin has an internal
16 OUTPUT MUTE pullup.
18 XTAL IN/EXT CLK Crystal or External Oscillator input.
22 XTAL OUT Crystal Oscillator output.
24 LOCK DETECT PLL Lock Detect output (active high).
28 SCO/SDO2 Serial Clock or Serial Data Output 2 complement.
29 SCO/SDO2 Serial Clock or Serial Data Output 2 true.
32 SDO Data Output complement.
33 SDO Data Output true.
36 SD SD indicator output. Output is high when locked to 270 Mbps.
Serial Clock or Serial Data 2 Output select. Sets second output to output the clock when
37 SCO_EN high and the data when low. This pin has an internal pulldown.
43 LF1 Loop Filter.
44 LF2 Loop Filter.
45 NC No Connect. Not bonded internally.
46 RSVD Reserved. Do not connect or connect to ground.
47 SEL0 Data Input select input. This pin has an internal pulldown.
48 SEL1 Data Input select input. This pin has an internal pulldown.
3, 6, 12, 14,
30, 31, 34, 35 V
CC
Positive power supply input.
DAP, 13, 17,
19, 20, 21,
23, 25, 26,
27, 38, 39,
40, 41, 42 V
EE
Negative power supply input.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
4 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated
Product Folder Links: LMH0036
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