2021 IEEE国际固态电路会议特刊：集成电路设计前沿

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"JSSC_202112" 这篇资源是《IEEE固态电路期刊》(JSSC) 2021年12月刊，专注于固态电路的晶体管级设计，特别是集成电路的设计。这个特刊是关于2021年IEEE国际固态电路会议（ISSCC）的专题，由Y. Chiu, M.-K. Law, N. Krishnapura, J. T. Stauth和J. S. Walling担任客座编辑。该期刊包含多篇研究论文，涵盖了温度传感器、湿度传感器、音频放大器和抑制干扰技术等多个领域的创新成果。其中一篇论文介绍了自我校准的混合热扩散率/电阻型温度传感器，作者是S. Pan, J. A. Angevare和K. A. A. Makinwa。这种传感器能够实现更精确的温度测量，并且可能具有自动校准功能，提高了系统可靠性。另一篇论文是关于能源高效的CMOS湿度传感器，采用自适应范围转移缩放CDC和电源感知浮动反相器放大器阵列，作者包括H. Li, Z. Tan等人。这项技术旨在提高湿度检测的能效，同时降低功耗。 A. Matamura等人提出了一种基于82毫瓦的无滤波器类D耳机放大器，具有-93分贝的总谐波失真加噪声（THD+N），113分贝的信噪比（SNR）以及93%的效率。这种设计为音频应用提供了高质量的音频输出和高能效。 T. Rooijers等人的工作则聚焦于一种填充技术，用于增强切换放大器中的IMD抑制，以提高信号处理的稳定性。最后，还有一种5伏动态单级级联放大器，采用类C并行结构，接近零电压摆幅，能够提升功率转换效率和性能。这些论文代表了固态电路领域的最新研究进展，展示了在传感器技术、能源效率和信号处理等方面的技术创新。对于从事集成电路设计、微电子学和相关领域的研究人员来说，这些研究成果具有很高的参考价值。

3558 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 56, NO. 12, DECEMBER 2021

TABLE I

ERFORMANCE SUMMARY AND COMPARISON TO PRIOR ART

Fig. 24. Noise power spectral densities of the WB and TD sensors.

D. Resolution and FoM

After decimated by sinc

ﬁlters, the sensors’ power spectral

densities (100-s interval, Hanning window, 3× averaging) are

shown in Fig. 24, and the corresponding resolution versus con-

version time plots are shown in Fig. 25. To accurately deter-

mine the WB sensor resolution, a differential measurement

is used, that is, it is calculated from the standard deviation

of the output difference between two identical sensors on the

same die. The WB sensor achieves 450 μK

rms

resolution with

conv

= 10 ms with a 1-s interval, which corresponds to a

0.13-pJ·K

resolution ﬁgure-of-merit (FoM). After enabling

system-level chopping ( f

CHL

= 100 Hz), its 1/ f noise corner

drops from ∼1 Hz to below 10 mHz. In comparison, the TD

sensor’s resolution is only 15 mK with T

conv

= 1sand f

CHL

1 Hz, which corresponds to a resolution FoM of 1.2 μJ·K

E. Comparison to Previous Work

Table I summarizes the p erformance of the proposed hybrid

sensor prototype and compares it with previous WB sen-

sors [8], [9] as well as other sensors with low-cost calibratio n

(BJT [4], [5] or TD [16]). Compared with prev ious WB

sensors, this work achieves a state-of-the-art relative inac-

curacy after a 2-pt temperature calibr a tion an d the lowest

Fig. 25. Resolution versus conv e rsion time of different sensors.

reported 1/ f noise corner, while the resolution FoM remains

roughly the same. After a cost-effective h eating-assisted

self-calibration that does not require accurate temperature

information, this sensor achieves an inaccuracy of 0.25

◦

from −55

◦

C to 125

◦

C(3σ), which is comparable to that

of the voltage-calibrated BJT sensors. Although slightly less

accurate than the state-of-the-art TD sensor [16], this sensor

is 6× more energy-efﬁcient. More importantly, it can achieve

sufﬁcient resolution for self-calibration with a short conversion

time of 1 s. It is also worth noting that this work serves as

a prototype of the TD/resistor hybrid temperature sensor. Due

to the scalability of TD senso rs, better performance can be

expected in nanometer CMOS processes.

VI. C

ONCLUSION

A hybrid TD/resistor-based temperature sensor has

been realized in a standard 0.18-μm CMOS technology.

By self-calibrating an inaccurate, but energy-efﬁcient,

resistor-based sensor using an inherently accurate, but

power-hungry, TD sensor, the hybrid sensor achieves both

high energy efﬁciency and decent accuracy. As the need for

external references and temperature-stabilized envir onments is

obviated by the use of an on-chip reference, calibration time

and costs can be greatly reduced. Also, the chip area overhead

PAN et al.: SELF-CALIBRAT ED HYBRID TD/RESISTOR-BASED TEMPERATURE SENSOR 3559

is suppressed by reusing the PDM readout circuit. The

sensor dissipates 66 μW from a 1.8-V supply and achieves

an inaccuracy of 0.25

◦

C(3σ) from −55

◦

C to 125

◦

Cafter

self-calibration at room temper ature (RT, ∼25

◦

C) and an

elevated temperature (∼85

◦

C). It also achieves a sub-10-mHz

1/ f noise corner and a resolution FoM of 0.13 pJ·K

CKNOWL EDGMENT

The authors would like to thank Z.-Y. Chang, L. Pakula, and

R. van Puffelen, for their assistance with the measurements.

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◦

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◦

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[15] C. P. L. v a n Vroonhoven and K. A. A. Makinwa, “Thermal diffusivity

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◦

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Mar. 2017.

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◦

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◦

C,” in IEEE Int. Solid-State

Circuits Conf. (ISSCC) Dig. Tech. Papers, Feb. 2021, pp. 78–79.

Sining Pan (Graduate Student Member, IEEE)

was born in Beijing, China, in 1991. He received

the B.Sc. degree in electronic engineering from

Tsinghua University, Beijing, in 2013, and the

M.Sc. and Ph.D. degrees in electrical engineering

both (cum laude) from Delft University Technology,

Delft, The Netherlands, in 2016 and 2021, respec-

tively. He is now a Post-Doctoral Researcher with

the Electronic Instrumentation Laboratory, Delft

Uni versity of Technology. His research interests

include smart sensors, CMOS frequency references,

and  modulators.

Dr. Pan was a recipient of the ADI Outstanding Student Designer Award

(2019) and the IEEE SSCS Pre-Doctoral Achiev e ment Award (2020). He

serves as a reviewer for the JSSC, TCAS-I, TCAS-II, TIM, Sensors Journal,

and T-VLSI.

Jan A. Angevare (Graduate Student Member, IEEE)

was born in Leiden, The Netherlands, in 1990.

He received the B.Sc. and M.Sc. degrees in electrical

engineering from the Delft University of Technol-

ogy, Delft, The Netherlands, in 2012 and 2015,

respectiv ely, where he is currently pursuing the

Ph.D. degree.

His research interests include mixed-signal design

and smart sensors.

KoﬁA.A.Makinwa(Fellow, IEEE) recei ved the

B.Sc. and M.Sc. degrees from Obafemi Awolowo

Uni versity, Ife, Nigeria, in 1985 and 1988, respec-

ti vely, the M.E.E. degree from the Philips Inter-

national Institute, Eindhoven, The Netherlands, in

1989, and the Ph.D. de gree from the Delft University

of Technology, Delft, The Netherlands, in 2004.

From 1989 to 1999, he was a Research Scien-

tist with Philips Research Laboratories, Eindhoven,

The Netherlands, where he worked on interactive

displays and digital recording systems. In 1999, he

joined the Delft University of Technology, where he is currently an Antoni van

Leeuwenhoek Professor and the Head of the Microelectronics Department. His

research interests include the design of mixed-signal circuits, sensor interfaces,

and smart sensors. This has led to 16 books, over 300 technical papers, and

over 30 patents.

Dr. Makinwa has been on the program committees of several IEEE con-

ferences, and was the Analog Subcom Chair of ISSCC. He has also served

the Solid-State Circuits Society as a Distinguished Lecturer and as an Elected

Member of its Adcom. He is currently one of the organizers of the Advances

in Analog Circuit Design Workshop and the Sensor Interfaces Meeting. He

is an ISSCC top-10 contributor, and a co-recipient of 16 best paper awards,

from the JSSC, ISSCC, VLSI, ESSCIRC, and Transducers, among others. He

is a member of the Royal Netherlands Academy of Arts and Sciences.

3560 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 56, NO. 12, DECEMBER 2021

Energy-Efﬁcient CMOS Humidity Sensors Using

Adaptive Range-Shift Zoom CDC and Power-Aware

Floating Inverter Ampliﬁer Array

Heyi Li , Graduate Student Member, IEEE, Zhichao Tan , Senior Member, IEEE, Yuanxin Bao, Member, IEEE,

Han Xiao, Hao Zhang, Member, IEEE, Kaixuan Du, Linxiao Shen

, Member, IEEE, Jiayoon Ru, Member, IEEE,

Yihan Zhang, Student Member, IEEE,LeYe

, Member, IEEE, and Ru Huang, Fellow, IEEE

Abstract—This article presents an adaptive zoom-capacitance-

to-digital converter (CDC)-based CMOS humidity sensor. The

humidity sensor is realized by means of two differential capac-

itors whose dielectrics are sensitive to humidity. The sensing

capacitors are interfaced with a zoom CDC, which consists

of a successive-approximation-register (SAR) analog-to-digital

converter (ADC) and a 3rd-order delta–sigma modulator (M).

The SAR ADC eliminates the inﬂuence of the baseline capaci-

tance to reduce the input range of the M. To improve the

energy efﬁciency of the CDC across the full input range, a power-

aware ﬂoating inverter ampliﬁer (FIA) array is proposed, which

is conﬁgured based on the conversion results of the SAR logic.

In addition, an adaptive range-shift (ARS) zoom CDC is proposed

to: 1) resist off-chip parasitics and interference and 2) allow low

redundancy and a more energy-efﬁcient FIA-based compara-

tor, thus reducing power consumption. The proposed CMOS

humidity sensor is implemented in a 0.11-μm CMOS process.

Measurement results show a capacitance resolution of 17.9 aF and

an effective number of bits (ENOB) of 14.0 within a conversion

time of 1.01 ms. The proposed humidity sensor consumes 1.5 μW

of power and exhibits a 0.0094 % relative humidity (RH)

resolution and a ±1.5 %RH peak-to-peak accuracy (3σ error

of 5.5 %RH) among 12 chips from 20 to 85 %RH, and it achieves

a ﬁgure of merit (FoM) of 0.135 pJ·%RH

,whichismorethan

six times better than the state of the art.

Index Terms—Adaptive range shift (ARS), capacitance-to-

digital converter (CDC), delta–sigma modulator (M), ﬂoating

inverter ampliﬁer (FIA), humidity sensor, power aware, zoom.

Manuscript received April 30, 2021; revised July 11, 2021 and August 27,

2021; accepted September 12, 2021. Date of publication October 20, 2021;

date of current version November 24, 2021. This article was approved by

Associate Editor Man-Kay Law. This work was supported in part by the

National Key Research and Development Program of China under Grant

2019YFB2204900 and in part by the 111 Project under Grant B18001.

(Corresponding authors: Le Ye; Ru Huang.)

Heyi Li, Hao Zhang, Kaixuan Du, Linxiao Shen, Jiayoon Ru, Yihan Zhang,

and Ru Huang are with the Beijing Laboratory of Future IC Technology

and Science, School of Integrated Circuit, Peking Univ ersity, Beijing 100871,

China (e-mail: ruhuang@pku.edu.cn).

Zhichao Tan is with the College of Information Science and Electronic

Engineering, Zhejiang Univ ersity, Hangzhou 310027, China.

Yuanxin Bao and Le Ye are with the Beijing Laboratory of Future IC

Technology and Science, School of Integrated Circuit, Peking University,

Beijing 100871, China, and also with the Advanced Institute of Infor-

mation Technology, Peking University, Hangzhou 311215, China (e-mail:

yele@pku.edu.cn).

Han Xiao is with the Advanced Institute of Information Technology, Peking

Uni versity , Hangzhou 311215, China.

Color versions of one or more ﬁgures in this article are available at

https://doi.org/10.1109/JSSC.2021.3114189.

Digital Object Identiﬁer 10.1109/JSSC.2021.3114189

I. INTRODUCTION

N THE era of the Internet of Things (IoT), an enormous

number of sensors need to be deployed at IoT nodes.

Energy-efﬁcient sensor interface circuits are the key to the

successful application of such sensors due to the limitations

of the batteries or energy harvesters of IoT nodes. In addition,

good sensor resolution is required to meet the demands for

the perception of weak signals, sen sor nonlinearity calibration,

and temperature compensation. Moreover, to ensure that such a

chip can remain stable for a long time in a ha rsh environment,

it must withstand process, voltage, and temperature (PVT)

variations as well as unforeseeable parasitics and interference.

Capacitive sensors are based on capacitance-to-charge con-

version followed b y charge-to-digital conversion [1]. They

are also very cost-effective thanks to the capacitor availabil-

ity in standard CMOS processes, which is crucial for IoT

nodes. As shown in (1), the sensing capacitance C

sense

determined by the dielectric constant ε and the distance d

between the capacitor plates as well as the area A of the

capacitor plates. Because any changes in these parameters

affect C

sense

, different sensors can be realized by utilizing

such parameter changes. For instance, humidity sensing can be

realized by taking advantage of the variation in the dielectric

constant ε [2]–[5]

Sense

ε·A

. (1)

There are two main challenges in the design of readout

systems for humidity sensors. First, limited by battery size and

the power harvested by energy harvesters, humidity sensors

for IoT applications need to be extremely efﬁcient in energy

usage. Second, they require a high conversio n resolution

for two-point calibration and temperature compensation. For

instance, for the humidity sensor reported in [2], the sensitivity

of the on-chip humidity capacitor is 1.4 fF/% relative humidity

(RH), which means that to achieve a target humidity resolution

of 0.05 %RH, a capacitance resolution of 70 aF is required.

Such a capacitance-to-digital converter (CDC) resolution is

needed to calibrate the worst case h umidity sensor nonlinearity

of ±0.8 %RH. In addition, the humidity capacitance is usually

on th e order of pF [2]–[5], and th e re is very little charge

information that can be transferred to the succeeding stages

See https://www.ieee.org/publications/rights/index.html for more information.

LI et al.: ENERGY-EFFICIE NT CMOS HUMIDITY SENSORS USING ARS ZOOM CDC 3561

due to the effect of the baseline capacitance, resulting in

deterioration in energy efﬁciency.

Successive approximation register (SAR)-based CDCs have

excellent energy efﬁciency when targeting low- and medium-

resolution applications [6]–[16], while for high-resolution

application scenarios, frequency-locked loop (FLL)-based and

delta–sigma ()-based CDCs are preferred. FLL-based

CDCs can achieve high resolution and suppress nonlinear-

ity across PVT variations but at the cost of high power

consumption due to their active ﬁlters and bias circuits [4].

-based CDCs can also achieve high resolution by virtue

of noise shaping. However, their power-hungry operational

transconductance ampliﬁers (OTAs) signiﬁcantly degrade their

energy efﬁciency.

Zoom CDCs were proposed in [3], [17], and [18] as a

hybrid of energy-efﬁcient SAR analog-to-digital converters

(ADCs) and high-resolution d elta–sigma modulators (Ms)

to achieve better performance. Nevertheless, conventional

zoom CDCs usually require high redundancy and low-offset

comparators to ensure that the signal falls in the M input

range. In addition, the bandwid th and driving capability of the

OTAs in conventional zoom CDCs are ﬁxed, and the energy

efﬁciency will degrade as the input capacitance decreases.

Therefore, there is a tradeoff between energy efﬁciency and

dynamic range.

This article addresses these issues by presenting a highly

adaptive zoom-CDC-based CMOS humidity sensor. It con-

sumes only 1.5 μW of power while achieving a ﬁgure of

merit (FoM) of 0.135 pJ·%RH

, which is better than the

previous state of the art, by virtue of three techniques:

1) a power-aware scheme that dynamically adjusts the num-

ber of active OTAs in accordance with the input capaci-

tance, optimizing the power over the entire dynamic range;

2) an adaptive range-shift (ARS) technique that shifts the

M working range to prevent the OTAs from working in

the low-gain region, allowing an ultralow-power compara-

tor and ultralow-power OTAs to be used; and 3) ﬂoating

inverter ampliﬁers (FIAs) [19], which further reduce the

power consumption thanks to their charge-domain biasing

nature.

This article is an extension of [20] an d is organized as

follows. Section II reviews conventional humidity sensors and

CDC techniques. Section III presents the proposed energy-

efﬁcient humidity sensor. Sectio n IV is devoted to the details

of the circuit implementation of the h umidity senso r. Section V

presents measured results. Finally, Section VI concludes this

article.

II. P

REVIOUS CD CS AND HUMIDITY SENSORS

A. SAR-Based CDCs

In SAR-based CDCs, complete conversion can be real-

ized within only a few conversion cycles, thus achieving a

short conversion time. In addition, active OTAs are rarely

used in conventional SAR-based CDCs. The major source

of energy consumption is the charging and discharging of

the input capacitor; therefore, high energy efﬁciency can

be achieved. Tanaka et al. [13] present a conventional

Fig. 1. (a) Parasitic-insensitive SAR CDC [14]. (b) Swing-enhanced SAR

CDC using the CDS technique [15].

SAR CDC using a charge redistribution technique. Since

an input capacitor and a digital-to-analog converter (DAC)

are directly connected together to charge and discharge the

capacitor, there is a large ﬁxed capacitance at the input of

the comparator, which signiﬁcantly reduces the input swin g

of the comparator, thereby limiting the effective number of

bits (ENOB) of the CDC. One solution is to isolate the input

of the comparator from the large input capacitance through

a switched-capacitor (SC) integrator, as shown in Fig. 1(a).

This increases the input swing through the closed-loop gain

and reduces the impact of the large ﬁxed capacitance on

the resolution loss [14]. Furthermore, Ha et al. [15] pro-

pose a correlated double sampling (CDS) technique that can

further increase the input swing, as shown in Fig. 1(b),

thereby reducing the resolution loss due to comparator offsets.

Fig. 2(a) [16] shows a differential SAR-based CDC using

inverter-based ampliﬁers, wh ich beneﬁts from signal ampli-

ﬁcation to alleviate the resolution loss caused by comparator

offsets to a certain extent. However, the gain of a single-stage

inverter-based ampliﬁer may not be adequate to overcome

the resolution loss caused b y the offset. Omran et al. [8]

report a single-ended CDC based on a chain of inverter-based

ampliﬁers, as shown in Fig. 2(b ). The high gain introduced by

the ampliﬁer chain can further reduce the resolution loss, but

this comes at the cost of increased power consumption.

B. M-Based and FLL-Based CDCs and Humidity Sensors

M-based and FLL-based CDCs are widely used for

high-resolution applications. There are two types of M-

based CDCs: SC-based discrete time (DT) CDCs [2], [21]

[shown in Fig . 3(a)] and voltage-controlled oscillator (VCO)-

based continuous time (CT) CDCs [22] [shown in Fig. 3(b)].

In DT-Ms, conventional SC integrators based on static

inverter-based ampliﬁers consume large static currents and

require a common-mode feedback (CMFB) circuit that fur-

ther increases power consumption, thus reducing the energy

efﬁciency of high-order Ms [2], [21], [23]–[25]. The

other type, CT-Ms, are based on VCOs [22]. Due to

the advantages of a VCO’s high resonant frequency and

3562 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 56, NO. 12, DECEMBER 2021

Fig. 2. (a) Differential SAR CDC using inverter-based ampliﬁers [16].

(b) SAR CDC using a chain of inverter -based ampliﬁers [8].

Fig. 3. (a) DT-M CDC using an SC [2]. (b) CT-MCDCusinga

VCO-based integrator [22]. (c) FLL-based CDC using a WhB [4].

multibit quantization [26]–[28], a short conversion time is

easy to achieve. In addition, a VCO has an intrinsic inte-

gral function, so noise shaping can also be implemented to

ensure th e conversion resolution. However, this architecture

requires a certain bias current or voltage from the reference

source.

Another time-domain quantization approach is based on an

FLL. Jiang et al. [4] report an FLL-based analog front end

(AFE), as shown in Fig. 3(c), which can support capacitive

and resistive sensors simultaneously. It is realized by means

of an SC-based Wheatstone bridge (WhB). This type of CDC

can suppress nonlinearities and PVT variations from a VCO

through the FLL to ensure precise conversion. However, this

comes at the cost of high power consumption in the active

ﬁlter and bias circuits. Unlike in a CT-M with a VCO as

an integrator [22], [26]–[28], the VCO in an FLL-based CDC,

together with a time-to-digital converter (TDC) (including a

differentiator), acts only as a quantizer. Thus, there is a large

signal swing in the VCO input, which will introduce more

distortion and limit the CDC performance [26].

Fig. 4. (a) Zoom CDC using dual quantization [3]. (b) Zoom CDC using a

VCO-based integrator [29].

Fig. 5. Block diagram of the proposed zoom-CDC-based humidity sensor

architecture.

C. Hybrid CDCs and Humidity Sensors

To combine the merits of SARs and Ms, zoom-based

CDCs and humidity sensors have been reported [3], [29], [30].

Coarse quantization of the input capacitance by an SAR ADC

can effectively expand the dynamic range, and then, ﬁne

quantization by a M can ensure the conversion resolution.

In addition, the zoom architecture can signiﬁcantly reduce the

input swing of the M, thereby reducing the output swing

requirement for an OTA so that more energy-efﬁcient OTA

schemes can be adopted. However, for either a DT zoom

CDC [3], as shown in Fig. 4(a), or a CT zoom CDC [29],

as shown in Fig. 4(b), high redundancy and a low-offset

comparator are usually required to ensure that the signal

falls in the M input range. Even so, it is difﬁcult to

make such a comparator immune to off-chip parasitics and

interference from chip packages and p rinted circuit boards

(PCBs). In addition, in conventional zoom CDCs, the integra-

tor power is determined by the maximum input capacitance.

A larger input capacitance necessitates a higher OTA current to

ensure that the complete settling time is within a clock cycle.

Therefore, under the condition o f a ﬁxed OTA bandwidth,

the OTA driving capability must be sufﬁciently high to cover

the worst case. However, for the smaller sensing capacitances

encountered in most cases, this design is far from optimal and

will result in signiﬁcant power waste.

III. P

ROPOSED ENE RGY-EFFICIENT HUMIDIT Y SENSOR

Fig. 5 shows a block diagram o f the proposed energy-

efﬁcient zoom-CDC-based humidity sensor. It consists of

a 6-bit SAR ADC, a 3rd-order M with an FIA array,

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