FUJITSU SEMICONDUCTOR LIMITED
CONTENTS
FUJITSU SEMICONDUCTOR CONFIDENTIAL
CHAPTER 11: I/O PORTS .................................................................................................................. 397
1. OVERVIEW .................................................................................................................................. 398
2. FEATURES ................................................................................................................................... 399
3. CONFIGURATION .......................................................................................................................... 400
4. REGISTERS ................................................................................................................................. 401
4.1. Port Data Register 00 to 19 : PDR00 to 19 (Port Data Register 00 to 19) .................... 404
4.2. Data Direction Register 00 to 19 : DDR00 to 19 (Data Direction Register 00 to 19) ..... 405
4.3. Port Function Register 00 to 19 : PFR00 to 19 (Port Function Register 00 to 19) ........ 406
4.4. Input Data Direct Register 00 to 19 : PDDR00 to 19 (Port Data Direct Register 00 to 19)
...................................................................................................................................... 407
4.5. Port Pull-up/down Enable Register 00 to 19 : PPER00 to 19 (Port Pull-up/down Enable
Register 00 to 19) ......................................................................................................... 408
4.6. Extended Port Function Register 00 to 88 : EPFR00 to 88 (Extended Port Function
Register 00 to 88) ......................................................................................................... 409
4.6.1. Extended Port Function Register 00, 01, 56 : EPFR00, EPFR01, EPFR56 ................................... 410
4.6.2. Extended Port Function Register 02 to 05, 57 to 60 : EPFR02 to 05, 57 to 60 .............................. 412
4.6.3. Extended Port Function Register 06 to 09, 33 to 36, 61 to 64 : EPFR06 to 09, 33 to 36, 61 to 64 ...
.........................................................................................................................................................................
................................................................................................................................................................... 415
4.6.4. Extended Port Function Register 10 to 15, 45, 71 to 78 : EPFR10 to 15, 45, 71 to 78 .............. 419
4.6.5. Extended Port Function Register 79, 80 : EPFR79, 80...................................................................... 423
4.6.6. Extended Port Function Register 86 : EPFR86 ................................................................................... 424
4.6.7. Extended Port Function Register 26 : EPFR26 ................................................................................... 425
4.6.8. Extended Port Function Register 27 : EPFR27 ................................................................................... 426
4.6.9. Extended Port Function Register 28 : EPFR28 ................................................................................... 427
4.6.10. Extended Port Function Register 29, 81, 82 : EPFR29, 81, 82 ........................................................ 428
4.6.11. Extended Port Function Register 83 : EPFR83 ................................................................................... 429
4.6.12. Extended Port Function Register 42 : EPFR42 ................................................................................... 430
4.6.13. Extended Port Function Register 43, 44 : EPFR43, 44...................................................................... 431
4.6.14. Extended Port Function Register 48 to 51 : EPFR48 to 51 ............................................................... 432
4.6.15. Extended Port Function Register 65 to 70 : EPFR65 to 70 ............................................................... 433
4.6.16. Extended Port Function Register 84, 85 : EPFR84, 85 ................................................................... 436
4.6.17. Extended Port Function Register 87 : EPFR87 ................................................................................... 437
4.6.18. Extended Port Function Register 88 : EPFR88 ................................................................................... 438
4.7. Port Input Enable Register: PORTEN (PORT ENable register) .................................... 439
4.8. KEY CoDe Register : KEYCDR ..................................................................................... 440
5. OPERATION ................................................................................................................................. 442
5.1. Pin I/O Assignment ........................................................................................................ 443
5.1.1. Peripheral I/O (bidirectional) Pin Assignment ...................................................................................... 444
5.1.2. Peripheral Input Assignment .................................................................................................................. 445
5.1.3. Peripheral Output Assignment ............................................................................................................... 447
5.1.4. External Bus Assignment........................................................................................................................ 448
5.1.5. Port Function (Input) Assignment .......................................................................................................... 449
5.1.6. Port Function (Output) Assignment ....................................................................................................... 450
5.1.7. AD Converter Input Assignment ............................................................................................................ 451
5.1.8. DA converter output assignment ........................................................................................................... 452
5.2. EPFR setting priority ...................................................................................................... 453
5.3. Notes on Input I/O Relocation Setting ........................................................................... 454
5.4. Noise Filter ..................................................................................................................... 455
5.5. Input blocked by GPORTEN .......................................................................................... 456
5.6. Notes on Pins with the AD Converter Function ............................................................. 457
5.7. Setting when Using the Base Timer TIOA1 Pin ............................................................. 458
5.8. Key Code Register Function Settings ............................................................................ 459
5.9. Operation at Wake Up from Power Shutdown ............................................................... 460
5.10. Notes on switching the I/O port function ........................................................................ 461
CHAPTER 12: INTERRUPT CONTROL (INTERRUPT CONTROLLER) .......................................... 463
1. OVERVIEW .................................................................................................................................. 464