SC16IS752/SC16IS762：I2C/SPI到UART转换器芯片详细规格

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"SC16IS752是一款基于I2C总线或SPI总线接口的双通道高性能UART芯片，提供高达5Mbit/s的数据传输速率，具有低功耗和休眠电流特性。该设备提供了8个可编程的I/O引脚，封装在非常小的HVQFN32和TSSOP28封装中，适用于便携式、电池供电的应用。它实现了从I2C总线/SPI到RS-232/RS-485的无缝协议转换，并且是完全双向的。SC16IS762与SC16IS752的主要区别在于，前者支持最高15Mbit/s的SPI时钟速度，而后者为4Mbit/s，且SC16IS762支持IrDA SIR高达1.152Mbit/s。此外，SC16IS752/SC16IS762的内部寄存器集与广泛应用的16C450兼容，使得软件编写或移植变得容易。芯片还具备自动硬件和软件流控制、自动RS-485支持等功能。" 详细说明： 1. **芯片特性**：SC16IS752/SC16IS762芯片设计用于串行通信，通过I2C或SPI接口与主机系统交互，提供两个独立的UART通道。这些通道可以实现高速数据传输，对于SC16IS752，其最大数据速率为5Mbit/s，而SC16IS762则进一步提高到15Mbit/s的SPI时钟速度。 2. **电源效率**：芯片的低功耗特性使其在电池供电设备中尤为适用，同时具有睡眠模式以进一步降低电流消耗，从而延长设备的电池寿命。 3. **I/O引脚**：除了串行通信功能，SC16IS752/SC16IS762还提供了8个可编程的I/O引脚，这些引脚可以根据应用需求进行配置，增加了芯片的灵活性。 4. **封装形式**：采用小型化的HVQFN32和TSSOP28封装，这使得芯片可以轻松集成到紧凑型电子设备中，特别适合手持设备。 5. **协议转换**：芯片能够实现I2C/SPI到RS-232/RS-485的协议转换，这在多种不同标准通信间建立连接时非常有用。RS-232适合短距离、高速通信，而RS-485则适用于长距离、多节点的通信。 6. **双向通信**：SC16IS752/SC16IS762支持双向通信，这意味着数据不仅可以从主机发送到外设，也可以从外设返回到主机，提高了通信的灵活性和效率。 7. **软件兼容性**：内部寄存器集与16C450兼容，使得已经为16C450编写的软件可以直接应用于SC16IS752/SC16IS762，简化了开发过程。 8. **高级功能**：自动硬件和软件流控制功能允许设备根据接收数据的速度自动调整传输速率，避免数据溢出或丢失。自动RS-485支持则简化了多点通信系统的配置。 9. **IrDA SIR支持**：仅在SC16IS762中提供，它可以支持红外数据协会（IrDA）的简单红外（SIR）模式，最高速度可达1.152Mbit/s，适用于需要红外通信的场合。 SC16IS752/SC16IS762芯片是嵌入式系统中实现高效、低功耗串行通信的理想选择，其灵活性和兼容性使其在各种应用场景中都能发挥出色性能。

Product data sheet Rev. 05 — 28 November 2006 10 of 60

NXP Semiconductors

SC16IS752/SC16IS762

Dual UART with I

C-bus/SPI interface, 64-byte FIFOs, IrDA SIR

7.2.2 Auto-CTS

Figure 6 shows CTS functional timing. The transmitter circuitry checks CTS before

sending the next data character. When CTS is active, the transmitter sends the next

character. To stop the transmitter from sending the following character, CTS must be

deasserted before the middle of the last stop bit that is currently being sent. The

Auto-CTS function reduces interrupts to the host system. When ﬂow control is enabled,

CTS level changes do not trigger host interrupts because the device automatically

controls its own transmitter. Without Auto-CTS, the transmitter sends any data present in

the transmit FIFO and a receiver overrun error may result.

7.3 Software ﬂow control

Software ﬂow control is enabled through the Enhanced Features Register and the Modem

Control Register. Different combinations of software ﬂow control can be enabled by setting

different combinations of EFR[3:0]. Table 3 shows software ﬂow control options.

(1) When CTS is LOW, the transmitter keeps sending serial data out.

(2) When CTS goes HIGH before the middle of the last stop bit of the current character, the transmitter ﬁnishes sending the

current character, but it does not send the next character.

(3) When CTS goes from HIGH to LOW, the transmitter begins sending data again.

Fig 6. CTS functional timing

start bit 0 to bit 7 stopTX

CTS

002aab041

start stop

bit 0 to bit 7

Table 3. Software ﬂow control options (EFR[3:0])

EFR[3] EFR[2] EFR[1] EFR[0] TX, RX software ﬂow control

0 0 X X no transmit ﬂow control

1 0 X X transmit Xon1, Xoff1

0 1 X X transmit Xon2, Xoff2

1 1 X X transmit Xon1 and Xon2, Xoff1 and Xoff2

X X 0 0 no receive ﬂow control

X X 1 0 receiver compares Xon1, Xoff1

X X 0 1 receiver compares Xon2, Xoff2

1011transmit Xon1, Xoff1

receiver compares Xon1 or Xon2, Xoff1 or Xoff2

0111transmit Xon2, Xoff2

receiver compares Xon1 or Xon2, Xoff1 or Xoff2

1111transmit Xon1 and Xon2, Xoff1 and Xoff2

receiver compares Xon1 and Xon2, Xoff1 and Xoff2

0011no transmit ﬂow control

receiver compares Xon1 and Xon2, Xoff1 and Xoff2

Product data sheet Rev. 05 — 28 November 2006 11 of 60

NXP Semiconductors

SC16IS752/SC16IS762

Dual UART with I

C-bus/SPI interface, 64-byte FIFOs, IrDA SIR

There are two other enhanced features relating to software ﬂow control:

• Xon Any function (MCR[5]): Receiving any character will resume operation after

recognizing the Xoff character. It is possible that an Xon1 character is recognized as

an Xon Any character, which could cause an Xon2 character to be written to the

RX FIFO.

• Special character (EFR[5]): Incoming data is compared to Xoff2. Detection of the

special character sets the Xoff interrupt (IIR[4]) but does not halt transmission. The

Xoff interrupt is cleared by a read of the Interrupt Identiﬁcation Register (IIR). The

special character is transferred to the RX FIFO.

7.3.1 Receive ﬂow control

When software ﬂow control operation is enabled, the SC16IS752/SC16IS762 will

compare incoming data with Xoff1/Xoff2 programmed characters (in certain cases, Xoff1

and Xoff2 must be received sequentially). When the correct Xoff characters are received,

transmission is halted after completing transmission of the current character. Xoff

detection also sets IIR[4] (if enabled via IER[5]) and causes IRQ to go LOW.

To resume transmission, an Xon1/Xon2 character must be received (in certain cases

Xon1 and Xon2 must be received sequentially). When the correct Xon characters are

received, IIR[4] is cleared, and the Xoff interrupt disappears.

7.3.2 Transmit ﬂow control

Xoff1/Xoff2 character is transmitted when the RX FIFO has passed the halt trigger level

programmed in TCR[3:0], or the selectable trigger level in FCR[7:6].

Xon1/Xon2 character is transmitted when the RX FIFO reaches the resume trigger level

programmed in TCR[7:4], or falls below the lower selectable trigger level in FCR[7:6].

The transmission of Xoff/Xon(s) follows the exact same protocol as transmission of an

ordinary character from the FIFO. This means that even if the word length is set to be 5, 6,

or 7 bits, then the 5, 6, or 7 least signiﬁcant bits of Xoff1/Xoff2, Xon1/Xon2 will be

transmitted. (Note that the transmission of 5, 6, or 7 bits of a character is seldom done, but

this functionality is included to maintain compatibility with earlier designs.)

It is assumed that software ﬂow control and hardware ﬂow control will never be enabled

simultaneously. Figure 7 shows an example of software ﬂow control.

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