AS3992UHF RFID阅读器芯片：兼容EPC Class 1 Gen 2

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"AS3992是一款高性能的UHF RFID单芯片阅读器，兼容EPC Class 1 Gen 2标准，适用于广泛的RFID读写器系统应用。" AS3992芯片是奥地利微电子公司(Austriamicrosystems)推出的一款集成了模拟前端和协议处理功能的UHF RFID阅读器芯片，它主要针对ISO18000-6c/b (900MHz)标准设计。这款芯片具备多种内置编程选项，因此能够适应各种不同的UHF RFID应用场景。与前一代产品AS3990/91相比，AS3992在性能上有显著提升。其接收灵敏度提高到-86dB，这意味着它可以更有效地捕获微弱的RFID信号，扩大了读取范围。此外，该芯片还集成了全可编程的RxDRM滤波器和预失真功能，这些特性对于优化信号质量和减少干扰至关重要。 AS3992的设计考虑了可扩展性，使得它更适合长距离和高功率的应用。它的数字权利管理(DRM)功能集成在芯片内，确保了在全球范围内符合各种法规要求。通过设置控制寄存器，用户可以精确调整读取器的各种参数，以适应不同环境和应用的需求。在通信接口方面，AS3992提供了并行或串行接口的选择，允许主机系统（MCU）与阅读器IC进行数据交换。如果采用硬件编码器和解码器，则可以进一步提升传输和接收数据的效率和可靠性。 AS3992是一款高度灵活且性能强大的UHF RFID解决方案，适用于那些需要高读取效率、远距离读取以及全球合规性的项目。无论是物流追踪、资产管理还是工业自动化，AS3992都能够提供出色的性能表现。其与前代产品的引脚和固件兼容性也使得升级或替换变得更加便捷。

www.austriamicrosystems.com Revision 5.5 9 - 53

AS3992

Data Sheet - Electrical Characteristics

6 Electrical Characteristics

VEXT = 5.3V, typical values at 25ºC, unless otherwise noted.

Table 3. Electrical Characteristics

Symbol Parameter Conditions Min Typ Max Units

VEXT

Supply current without PA driver

current

EXT

Consumption

120 mA

VEXT

VEXT2

Supply Current for internal PA

EXT2

Consumption,

EXT2

= 2.5V

140 mA

STBY

Standby current 3 mA

Supply current in power-down mode

All system disabled including supply

voltage regulators

210µA

AGD

AGD voltage 1.5 1.6 1.7 V

POR

Power on reset voltage (POR) 1.4 2.0 2.5 V

VDD

Regulated supply for internal circuitry

and for external MCU

3.2 3.4 3.6 V

DD RF

Regulated supply for internal PA 1.9 2 2.1 V

VDD MIX1

Regulated supply for mixers, bit

vext_low=L

The difference between the external

supply and the regulated voltage is higher

than 250mV

4.5 4.8 5.1 V

VDD MIX2

Regulated supply for mixers, bit

vext_low=H

The difference between the external

supply and the regulated voltage is higher

than 250mV

3.5 3.7 3.9 V

PSSR

Rejection of external supply noise on

the supply regulators

The difference between the external

supply and the regulated voltage is higher

than 250mV

26 dB

RFAUX

Auxiliary output power 0 dBm

RFOUT

Internal PA output power 20 dBm

RFIN

RFIN input resistance 100 Ω

SENS-NOM

Data sensitivity Nominal mixer setting, PER=0.1% -66 dBm

SENS-GAIN

Data sensitivity Increased mixer gain, PER=0.1% -76 dBm

SENS-LBT

LBT sensitivity Max. LBT sensitivity -86 dBm

1dB

Input 1dB compression point

Nominal mixer setting

10 dBm

IP3 Third order intercept point 21 dBm

REC

Recovery time after modulation Maximum LF selected 10 µs

Logic Input/Output

Max. CLK frequency 2 MHz

LOW

Input logic low 0.2

DD_IO

HIGH

Input logic high 0.8

DD_IO

Output resistance IO0…IO7 low_io = H for VDD_IO<2.7V 400 800 Ω

CL SYS

Output resistance CL SYS low_io = H for VDD_IO<2.7V 200 Ω

www.austriamicrosystems.com Revision 5.5 11 - 53

AS3992

Data Sheet - Detailed Description

7 Detailed Description

The RFID reader IC comprises complete analog and digital functionality for reader operation including transmitter and receiver section with

complete EPC Gen2 or ISO18000-6C digital protocol support. To integrate as many components as possible, the device also comprises an on-

board PLL section with integrated VCO, supply section, DAC and ADC section, and host interface section. In order to cover a wide range of

possibilities, there is also Configuration registers section that configures operation of all blocks.

For operation, the device needs to be correctly supplied via. VEXT and VEXT2 pins and enabled via. EN pin (Refer Supply on page 11 for

connecting to supply and Power Modes on page 12 about operation of the EN pin). At power-up, the configuration registers are preset to a

default operation mode. The preset values are described in the Configuration Registers Address Space on page 23 below each register

description table. It is possible to access and change registers to choose other options.

The communication between the reader and the transponder follows the reader talk first method. After power-up and configuring IC, the host

system starts communication by turning on the RF field by setting option bit rf_on in the ‘Chip status control register’ (00) (see Table 13) and

transmitting the first protocol command (Select in EPC Gen2). Transmitting and receiving is possible in the following two modes:

1. Normal Data Mode: In this mode, the TX and RX data is transferred through the FIFO register and all protocol data processing is done

internally.

2. Direct Data Mode: In this mode, the data processing is done by the host system.

7.1 Supply

The effective supply system of the chip decreases the influence of the supply noise and interference and thus improves de-coupling between

different building blocks. A set of 3.4V regulators is used for supplying the reference block, AD and DA converters, low frequency receiver cells,

the RF part, and digital part. It is possible to use the digital part supply VDD_D for supplying the external MCU with a current consumption up to

20mA. The input pin for the regulators is VEXT. The output pins for regulators are VDD_A, VDD_LF, VDD_D, VDD_RFP and VDD_B. Each of

the pins require stabilizing capacitors to connected ground (2.2…10µF and 10…100nF) in parallel. Depending on quality of the capacitors,

100pF could be required.

Figure 3. Mixer Supply

An additional 4.8V regulator is used for the input RF mixers supply. The input of this regulator is VEXT, output is VDD_MIX pin. For correct

operation of the 4.8V regulator, the VEXT voltage needs to be between 5.3V and 5.5V. VDD_MIX needs de-coupling capacitors to VDD_MIX like

other VDD pins.

VDD_MIX

VDD_5LFI

VDD_TXPAB

CBV5

COMP_A

COMP_B

COMN_A

COMN_B

Mixer

LDO

VEXT

receive

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