51.2 / B.-w. Lee
51.2: Reducing Gray-Level Response to One Frame:
Dynamic Capacitance Compensation
Baek-woon Lee
1
, Cheolwoo Park, Sangil Kim, Manbok Jeon, Jun Heo,
Dongsik Sagong, Jongseon Kim, and Junhyung Souk
AMLCD Div., Samsung Electronics Corp.
San 24, Nongseo-ri, Giheung-eup, Yongin-si, 449-711, S. KOREA
1
E-mail Address: LeeBWoon@samsung.co.kr
Abstract
A novel driving scheme, named Dynamic Capacitance Compensa-
tion (DCC), for active-matrix (AM) LCDs was developed. It takes
the charge-&-hold nature of AM-LCDs into consideration to en-
hance the switching speed. By incorporating DCC and faster liquid
crystal, a TFT-LCD whose response time was less than 10 ms for
all gray levels with the on + off time of 8.4 ms was developed. DCC
can be applied to any kind of LCD modes to reduce the gray re-
sponse time to less than 1 frame.
1. Introduction
The slow electro-optical response time of LCD panels has been the
major roadblock for the LCD market to expand beyond notebook
and computer monitors. Although there have been significant pro-
gresses in enhancing the switching speed of nematic liquid crystals
(LCs), visual artifacts [1] resulting from the slow response are still
quite noticeable. The full on/off time may be adequately fast
enough, but the response time (RT) between intermediate grays is
inherently slow: more than 10 times as slow as the full on/off time
[2].
Synthesizing even faster LC molecules is one obvious way to go.
However, the road will be quite difficult and long since the speed
must increase several times as much, and as it turned out, the raw
speed of LC alone is not enough in multiplex addressing. A novel
driving scheme, DCC, is an immediate cure for the slow response.
By applying DCC to a variety of LCD panels, we could limit the
response times between all gray levels to 1 frame
2. About Response Time
2.1 The Misconceptions
The switching performance of an LCD has been represented by the
time that it takes in switching between full white and full black.
This number can lead to a grave misunderstanding. First of all, de
facto definition of response time (RT
10-90
) is from 10% to 90% (or
vice versa), not 0% ↔ 100%. Since the optical response is expo-
nential, a significant amount of time is required for an LCD to go
past 90% to reach 100% (or from 10% to 0%) [Figure 1]. With
RT
10-90
of, for example, 14 ms, the “true” RT can be as long as 30
ms. In a transition to a lower gray, the remaining 10% is more no-
ticeable because darker grays are more closely spaced: 10% of full
white (gray 255) corresponds to about gray 90, or 35% of the full
gray scale.
Secondly, the full on/off time can not describe the overall perform-
ance of an LCD because each individual inter-gray RT is equally
important, if not more, and it shows vastly different cha acteristic.
In 8-gray scale, the on/off time specify only 2 out of 56 inter-gray
transitions.
2.2 Inter-gray Response Time and Dynamic
Capacitance
Inter-gray optical response is intrinsically slower than the full on/off
speed. The full on/off switching speed appears faster because it
involves transmission-saturated regions where the transmission
changes little as the state of the LC director configuration changes.
Furthermore, in rising response (higher electric field applied), the
switching speed is proportional to V
2
-V
th
2
[3]. Therefore, the rising
response time in low field can be extremely slow (> 100 ms).
There is another factor, apart from the physical speed of the LC
material or the mode that slows multiplex LCDs: the driving
method. The current driving method does not consider the dynamic
nature of LC capacitance, and therefore, can not provide pixels with
an accurate amount of charge. In the Active Matrix (AM) driving
method, it is assumed that constant charge is maintained, rather than
constant voltage since the TFT is turned on for only 1/N of 1 frame
where N is the number of horizontal lines (including the virtual
blank lines) of the display. Voltage applied to a pixel capacitor will
change as the capacitance of LC changes. Imagine a pixel capaci-
tance (including the storage capacitor) that assumes the following
linear form.
C(V)/C
0
=
α
(V +
β
), V
th
< V < V
sat
.
In the n
th
frame, V
n
is applied to a pixel, which was at V
n-1
previ-
ously. After the TFT is turned off, the voltage changes to V
f
even-
tually. Since the charge is conserved,
Q = C(V
n-1
) V
n
= C(V
f
) V
f
(
V
n-1
+
β
)
V
n
= (
V
f
+
β
)
V
f
2
)(4
1
2
βββ
+++−
=∴
−nn
f
VV
V
In order for the pixel to reach the desired voltage level V
n
, the fol-
lowing V
n
’ should have been applied instead.
+
−
+=
+
+
=
−
−
−
ββ
β
1
1
1
1'
n
nn
nn
n
n
n
V
VV
VV
V
V
V
In other words, pixels are always given an intermediate voltage V
n-1
< V
f
< V
n
or V
n
< V
f
< V
n-1
. As a consequence, even if LCs were
very fast, AM-LCD panels would still show the frame response [4,
Figure 1] and the panel RT would be longer than 1 frame unless the
raw switching speed was comparable to the charging time (~ 20 µs
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