DRV2624：超低功耗LRA/ERM触觉驱动器

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"TI-DRV2624是一款由德州仪器（TI）推出的超低功耗、闭环线性共振致动器（LRA）/电动机电磁致动器（ERM）驱动器，它具备内部存储器，能进行智能控制与诊断。" TI的DRV2624是一款专为触觉反馈设计的高效驱动器，它集成了多种功能以优化对LRA和ERM的控制。这款芯片支持I2C接口，通过这个接口可以配置和控制设备的各项参数，如回电动势（Back-EMF）检测、控制和播放引擎。I2C通信协议允许微控制器轻松地与DRV2624交互，实现精确的触觉反馈控制。 DRV2624的主要特性包括： 1. **超低功耗**：在待机模式下，该器件能够实现极低的功耗，有助于延长电池寿命。此外，它还有一个超低功耗关断模式，进一步节省能量。 2. **闭环控制**：通过内部的回电动势检测，DRV2624能够实现闭环控制，确保准确的振动强度和频率。 3. **执行器诊断**：基于电阻的诊断系统可以监控执行器的状态，提供短路保护，并检测潜在的故障。 4. **SimpleDrive单线制振动方案**：这种简化了的驱动方案使得系统集成更简单，减少了外部组件的需求。 5. **自动谐振跟踪和报告**：DRV2624能自动识别并跟踪执行器的谐振频率，确保最佳性能。 6. **自动过驱动和制动**：这一功能可以实现更平滑的启动和停止，同时防止执行器在工作过程中出现过度振动。 7. **自动级别校准**：根据电池电压变化自动调整驱动水平，保证一致的触觉体验。 8. **动态和可编程输出钳位阻抗**：根据执行器的不同需求，用户可以通过编程调整输出阻抗，以达到最佳驱动效果。 9. **1kB RAM**：内置的内存可以存储多个触觉波形，支持循环播放和定制触觉反馈序列。 10. **热保护和电池监控**：芯片内置的保护机制可以在温度过高时关闭驱动，防止损坏，并监测电池电压，确保在电池电量低时仍能稳定工作。此外，DRV2624还包括一个TRIG/INTZ引脚用于触发和中断，SDA和SCL是I2C通信的串行数据和串行时钟引脚，NRST为复位输入，VDD和VDD_Gate为电源引脚，OUT±为执行器驱动输出。总体而言，DRV2624是针对移动设备、消费电子等应用的理想触觉反馈解决方案，其智能控制和诊断功能使其在节能、可靠性和用户体验方面表现出色。配合TI提供的技术文档、工具软件和支持社区，用户可以更方便地进行产品开发和问题解决。

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DRV2624

ZHCSEH2A –DECEMBER 2015–REVISED DECEMBER 2015

www.ti.com.cn

Feature Description (接接下下页页)

8.3.4.1 Internal Memory Interface

The DRV2624 device is designed with 1 kB of integrated RAM for waveform storage used by the playback

engine. The data is stored in an efficient way (voltage-time pairs) to maximize the number of waveforms that can

be carried. The playback engine also has the ability to generate smooth ramps (up or down) by relying on the

start-waveform and end-waveform points and by using linear interpolation techniques.

Storing waveforms on the DRV2624 instead of the host processor has several advantages including:

• Offloading processing requirements, such as digital streaming (RTP).

• Improving latency by storing the waveforms on the DRV2624 and only requiring a trigger signal.

• Reducing I

C traffic by eliminating the requirement to transfer waveform data

8.3.4.1.1 Library Parameterization

The waveforms stored in the internal memory are augmented by the time offset parameters. This augmentation

occurs only for the waveforms stored in the internal memory and not for RTP mode. The purpose of this

functionality is to add time stretching (or time shrinking) to the waveform. This functionality is useful for

customizing the entire library of waveforms for a specific actuator rise time and fall time.

The time parameters that can be stretched or shrunk include:

ODT Overdrive time

SPT Sustain positive time

SNT Sustain Negative Time

BRT Brake Time

The time values are additive offsets and are 8-bit signed values. The default offset of these values is 0. Positive

values add and negative values subtract from the time value of the effect that is currently played. The most

positive value in the waveform is automatically interpreted as the overdrive time, and the most negative value in

the waveform is automatically interpreted as the brake time. These time-offset parameters are applied to both

voltage-time pairs and linear ramps. For linear ramps, linear interpolation is stretched (or shrunk) over the two

operative points for the period.

(4)

8.3.4.1.2 Playback Interval

The internal memory ticks are by default interpreted as 5-ms intervals. if additional granularity is desired, then a

1-ms interval can be selected by using the PLAYBACK_INTERVAL bit.

8.3.4.1.3 Waveform Sequencer

The waveform sequencer queues waveform identifiers for playback. Eight sequence registers queue up to eight

waveforms for sequential playback. A waveform identifier is an integer value referring to the index position of a

waveform in the internal library. Once the user has selected the Waveform Playback as the process to run in the

MODE[1:0] parameter, playback begins at WAV_FRM_SEQ1 when the user triggers the process (either with the

GO bit or externally, if configured to do so). When playback of that waveform ends, the waveform sequencer

plays the waveform identifier held in WAV_FRM_SEQ2 if the next waveform is non-zero. The waveform

sequencer continues in this way until it reaches an identifier value of zero or until all eight identifiers are played,

whichever scenario is reached first.

The waveform identifier range is 1 to 127. The MSB of each sequence register can implement a delay between

sequence waveforms. When the MSB is high, bits [6:0] indicate the length of the wait time. The wait time for that

step then becomes WAV_FRM_SEQ[6:0] × 10 ms.

The DRV2624 allows for looping each waveform a number of times before moving onto the next waveform

identifier. The waveform-looping functionality can be configured by the WAV_SEQ_LOOP parameters.

Get into Mode

Wait for Trigger in Standby Mode

Play Process

/ Trigger Received

/ Trigger Cancellation Received

/ Process Done

DRV2624

www.ti.com.cn

ZHCSEH2A –DECEMBER 2015–REVISED DECEMBER 2015

Feature Description (接接下下页页)

The DRV2624 also allows for looping the entire waveform sequencer by configuring the WAV_SEQ_MAIN

parameter. In this case, the waveform sequencer will loop all valid WAV_FRM_SEQn identifiers according to the

number specified in the WAV_SEQ_MAIN. For example, if the first and second identifiers are valid (for example

1 and 2), the third identifier is 0 (signaling to stop), and the WAV_SEQ_MAIN is configured to loop once (play the

waveform sequence twice), then the DRV2624 device will play waveform 1, then waveform 2, then waveform 1

then waveform 2, and then go to standby.

8.3.4.2 Real-Time Playback (RTP) Interface

The real-time playback mode is a simple, single 8-bit register interface that holds an amplitude value. When real-

time playback is enabled, the RTP_INPUT parameter, which represents an amplitude value, is sent directly to the

playback engine. Once triggered, the value is played until the user sends a stop trigger or removes the device

from RTP mode. The RTP mode is a digital streaming mode where the user enters a register value over the I

Because of the similarity between RTP mode and legacy PWM modes, any API (application-programming

interface) designed for use with a PWM generator in the host processor can write the data values over the I

rather than writing the data values to the host timer. This ability frees a timer in the host while retaining

compatibility with the original software.

For the LRA, the DRV2624 device automatically tracks the resonance frequency unless the CONTROL_LOOP

bit is set to open loop operation. If the CONTROL_LOOP bit is set to open loop, the LRA is driven according to

the open-loop frequency set in the OL_LRA_PERIOD parameter.

8.3.4.3 Process Trigger

All processes (RTP, Waveform Sequencer, Calibration and Diagnostics) in the DRV2624 device are triggered

processes, which means that the user has to trigger the process before the process begins. A trigger can be

achieved by software using the GO bit, or by hardware using the TRIG/INTZ pin. The process stops once it

finishes, or if a stop trigger is sent. For information on external trigger functionality refer to Multi-Purpose Pin

Functionality.

A typical process (either RTP, Waveform Sequencer, Calibration or Diagnostics) will start and end follwing the

diagram in 图 18.

图图 18. Typical Process Execution

8.3.5 Noise Gate Control

The DRV2624 device features a noise gate that filters out any voltage smaller than a particular threshold to

prevent unintended vibrations. The NG_THRESH bit controls the threshold.

8.3.6 Edge Rate Control

The DRV2624 output driver implements edge rate control (ERC). This control ensures that the rise and fall

characteristics of the output drivers do not emit levels of radiation that could interfere with other circuitry common

in mobile and portable platforms. Because of ERC most system do not require external output filters, capacitors,

or ferrite beads.

DRV2624

ZHCSEH2A –DECEMBER 2015–REVISED DECEMBER 2015

www.ti.com.cn

Feature Description (接接下下页页)

8.3.7 Constant Vibration Strength

The DRV2624 device features power-supply feedback. If the supply voltage drifts over time (because of battery

discharge, for example), the vibration strength remains the same as long as enough supply voltage is available to

sustain the required output voltage.

8.3.8 Battery Voltage Reporting

During playback, the DRV2624 device provides cycle-by-cycle voltage measurement of the V

pin. The

VBAT[7:0] parameter provides this information.

8.3.9 Ultra Low-Power Shutdown

Setting the device into shutdown state by using the NRST pin reduces the power consumption to sub-micro

levels, allowing the system to preserve power when haptics are not required. In this state, register content is not

preserved.

8.3.10 Automatic Go-To-Stand-by (Low Power)

The DRV2624 automatically goes into a low power standby state when not in use. In this state, register content

is preserved and I

C communication is available. The DRV2624 features a fast turn-on time from standby when

requested to play a waveform

8.3.11 I

C Watchdog Timer

If an I

C stops unexpectedly, the possibility exists for the I

C protocol to remain in a hanged state. To allow for

the recovery of the communication without having to power cycle the device, the DRV2624 device includes an

automatic watchdog timer that resets the I

C protocol without user intervention after 4.33 ms.

8.3.12 Device Protection

The DRV2624 device has integrated protection circuits for thermal and over-current protection, as well as for

UVLO. When such conditions are present, the DRV2624 device will immediately stop playback and go into the

standby state. The respective status bit will be set in register 0x01, which will be cleared upon reagister read. An

interrupt can be fired if the DRV2624 device is configured to do so.

If the critical condition disappears (the over-current condition goes away), the DRV2624 device will proceed with

normal operation, but because the status bits are sticky, they will continue to be asserted until the status register

is read.

8.3.12.1 Thermal Sensor

The DRV2624 has a thermal circuit that immediately puts the device in standby state and sets the OVER_TEMP

bit in the event of an over-temperature condition.

If the interrupt functionality is selected in the TRIG_PIN_FUNC parameter and the interrupt is not masked, and

interrupt will be fired to alert the host processor of a critical condition.

8.3.12.2 Over-Current Protection

During waveform playback, if the impedance at the output pin of the DRV2624 device is too low, the DRV2624

device immediately goes into standby state and latches the over-current flag (OC_DETECT bit).

If the interrupt functionality is selected in the TRIG_PIN_FUNC parameter and the interrupt is not masked, an

interrupt will be fired to alert the host processor of a critical condition.

8.3.12.3 VDD UVLO Protection

The DRV2624 device has a battery monitor that monitors the VDD level to ensure that is above a configurable

threshold (using UVLO_THRES[2:0] parameter).

In the event of a VDD droop, the DRV2624 device immediately goes into standby state to reduce current

consumption and latches the UVLO flag (UVLO bit).

DRV2624

www.ti.com.cn

ZHCSEH2A –DECEMBER 2015–REVISED DECEMBER 2015

Feature Description (接接下下页页)

If the interrupt functionality is selected in the TRIG_PIN_FUNC parameter and the interrupt is not masked, and

interrupt will be fired to alert the host processor of a critical condition.

8.3.12.4 Brownout Protection

The DRV2624 device has on-chip brownout protection. When activated, a reset signal is issued that returns the

DRV2624 device to the initial default state. If the regulator voltage V

(REG)

goes below the brownout protection

threshold (V

(BOT)

) the DRV2624 device automatically shuts down. When V

(REG)

returns to the typical output

voltage (1.8 V) the DRV2624 device returns to the initial device state. The brownout protection threshold (V

(BOT)

)

is typically at 1.6 V.

8.3.13 POR

The POR circuit was designed to enable the device only when both VDD and REG voltages are at a healthy

level. If REG voltage level were to dip below the reset threshold, the device will automatically abort any process

and until appropriate power levels are available, once a valid voltage is present in both VDD and REG nodes, the

device will proceed with the power-up sequence and return to the default state. If VDD drops below UVLO with

VREG still at a healthy level, the device will immediately go into standby state.

8.3.14 Silicon Revision Control

The DRV2624 has a revision control implemented in CHIPID[3:0] and REV[3:0] parameter (located in register

0x00). This feature allows an external controller to determine which device is connected to it and select the

appropriate firmware to control the device, which makes firmware development easier to port from one platform

to another.

8.3.15 Support for LRA and ERM Actuators

The DRV2624 device supports both LRA and ERM actuators. The default state is LRA mode, but can be

changed by using the LRA_ERM bit.

8.3.16 Multi-Purpose Pin Functionality

To enhance the flexibility of the DRV2624, the TRIG/INTZ pin is a configurable, multi-purpose pin that takes

different functionality depending on the mode of operation. The pin can serve as an input trigger-pulse pin, as an

input trigger-level (enable) pin and as an output interrupt pin. Note that the TRIG/INTZ pin can only execute one

function at a time (either trigger-edge, trigger-level (enable) or interrupt function), therefore if a particular function

is selected (for example, TRIG/INTZ configured as input trigger-edge), then the other functionality will not be

available (for example, interrupt).

8.3.16.1 Trigger-Pulse Functionality

The trigger-pulse functionality allows for an external processor to initiate the process (either waveform

sequencer, RTP, diagnostics or calibration) by pulsing the TRIG/INTZ pin. The process will initiate and play until

it is done, at which point it will go back into standby mode to preserve power. If a stop trigger (another trigger-

pulse) is received before the routine has finished, the routine will stop and the device will go back into standby

state. In the case of diagnostics mode, a stop trigger causes the diagnostic routine to abort and no result will be

reported. In the case of automatic level calibration routine, a stop trigger will cause the calibration to abort unless

the AUTO_CAL_TIME[2:0] is set to trigger control, in which case the stop trigger is required for the calibration to

complete, and the calibration will graciously finish and provide the expected output. Also note that a stop trigger

can also be achieved by writing 0 to the GO bit.

The minimum pulse width duration is 1 µs.

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