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Apollo2 MCU:超低功耗电池设备的创新解决方案
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更新于2024-07-17
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Apollo2 MCU是一款专为电池供电设备设计的超低功耗、高度集成的微控制器,由Ambiq Micro公司开发。这款微控制器针对的是诸如可穿戴电子设备、活动与健康监测器以及无线传感器等应用,其核心特点是将超低功耗的传感器转换电路与高性能ARM Cortex-M4处理器(带浮点单元)相结合。这样的设计使得在极低的功耗下,能够实现复杂传感器处理任务,如语音关键词检测、高级情境识别、手势识别和活动监控,从而显著提升设备的电池寿命,可达数周、数月甚至数年。
Apollo2 MCU采用Ambiq Micro的专利Subthreshold Power Optimized Technology (SPOT) 平台,该平台在低功耗设计方面树立了全新的行业标准。其主要特性包括:
1. **极低功耗**:
- 在3.3V电压下执行时,从闪存运行的电流低于10 µA/MHz,从RAM运行时更低至10 µA/MHz。
- 在深度睡眠模式下,配合RTC(实时时钟),功耗低至3 µA,显著节省能源。
2. **高性能处理器**:
- 基于ARM Cortex-M4,最高工作频率可达48 MHz。
- 内置浮点单元,支持更复杂的计算任务。
- 配备内存保护单元,确保代码和数据的安全性。
- 包含一个带有32个中断的唤醒中断控制器,提高系统响应速度。
3. **内存配置**:
- 提供最多1 MB的闪存用于存储代码和数据,满足大容量需求。
- 拥有256 KB的低泄漏RAM,进一步降低功耗。
- 内置16 kB的双路关联性缓存,提升数据访问效率。
4. **传感器接口**:
- 支持14位ADC,采样率高达1.2 MS/s,最多可选15个输入通道,适应多样化的传感器连接。
- 提供电压比较器功能,便于传感器信号的精确处理。
5. **附加功能**:
- 包括SPI/I2C从站接口,方便与外部设备通信。
- 内置SPI/I2C主控和UART,增强扩展能力。
- 集成了磁力计和陀螺仪,带有数字输出,支持位置和运动数据测量。
- 加速度计同样带有数字输出,提供设备运动状态的精确检测。
Apollo2 MCU凭借其出色的低功耗性能和丰富的功能集,成为电池供电设备中的理想选择,尤其适合对续航时间和能效要求极高的应用领域。通过灵活的接口和强大的处理能力,它极大地简化了系统设计,提高了电池寿命和用户体验。
Apollo2 Datasheet
DS-A2-1p0p1 Page 16 of 548 2018 Ambiq Micro, Inc.
All rights reserved.
Table 229: INTSTAT Register Bits .......................................................................................... 168
Table 230: INTCLR Register ................................................................................................... 169
Table 231: INTCLR Register Bits ............................................................................................ 170
Table 232: INTSET Register .................................................................................................... 171
Table 233: INTSET Register Bits ............................................................................................. 171
Table 234: Mapping of Direct Area Access Interrupts and Corresponding REGACCINTSTAT
Bits ............................................................................................................................................. 176
Table 235: I/O Interface Interrupt Control ................................................................................ 179
Table 236: IOSLAVE Register Map ........................................................................................ 187
Table 237: FIFOPTR Register .................................................................................................. 188
Table 238: FIFOPTR Register Bits .......................................................................................... 188
Table 239: FIFOCFG Register ................................................................................................. 188
Table 240: FIFOCFG Register Bits .......................................................................................... 189
Table 241: FIFOTHR Register ................................................................................................. 189
Table 242: FIFOTHR Register Bits .......................................................................................... 189
Table 243: FUPD Register ........................................................................................................ 190
Table 244: FUPD Register Bits ................................................................................................ 190
Table 245: FIFOCTR Register ................................................................................................. 190
Table 246: FIFOCTR Register Bits .......................................................................................... 190
Table 247: FIFOINC Register .................................................................................................. 191
Table 248: FIFOINC Register Bits ........................................................................................... 191
Table 249: CFG Register .......................................................................................................... 191
Table 250: CFG Register Bits ................................................................................................... 192
Table 251: PRENC Register ..................................................................................................... 192
Table 252: PRENC Register Bits .............................................................................................. 193
Table 253: IOINTCTL Register ............................................................................................... 193
Table 254: IOINTCTL Register Bits ........................................................................................ 193
Table 255: GENADD Register ................................................................................................. 194
Table 256: GENADD Register Bits .......................................................................................... 194
Table 257: INTEN Register ...................................................................................................... 194
Table 258: INTEN Register Bits .............................................................................................. 194
Table 259: INTSTAT Register ................................................................................................. 195
Table 260: INTSTAT Register Bits .......................................................................................... 195
Table 261: INTCLR Register ................................................................................................... 196
Table 262: INTCLR Register Bits ............................................................................................ 196
Table 263: INTSET Register .................................................................................................... 197
Table 264: INTSET Register Bits ............................................................................................. 197
Table 265: REGACCINTEN Register ...................................................................................... 198
Table 266: REGACCINTEN Register Bits .............................................................................. 198
Table 267: REGACCINTSTAT Register ................................................................................. 198
Table 268: REGACCINTSTAT Register Bits .......................................................................... 199
Table 269: REGACCINTCLR Register ................................................................................... 199
Table 270: REGACCINTCLR Register Bits ............................................................................ 199
Table 271: REGACCINTSET Register .................................................................................... 199
Table 272: REGACCINTSET Register Bits ............................................................................ 200
Table 273: HOST_IER Register ............................................................................................... 200
Apollo2 Datasheet
DS-A2-1p0p1 Page 17 of 548 2018 Ambiq Micro, Inc.
All rights reserved.
Table 274: HOST_IER Register Bits ........................................................................................ 200
Table 275: HOST_ISR Register ............................................................................................... 201
Table 276: HOST_ISR Register Bits ........................................................................................ 201
Table 277: HOST_WCR Register ............................................................................................ 201
Table 278: HOST_WCR Register Bits ..................................................................................... 202
Table 279: HOST_WCS Register ............................................................................................. 202
Table 280: HOST_WCS Register Bits ..................................................................................... 202
Table 281: FIFOCTRLO Register ............................................................................................ 203
Table 282: FIFOCTRLO Register Bits ..................................................................................... 203
Table 283: FIFOCTRUP Register ............................................................................................ 203
Table 284: FIFOCTRUP Register Bits ..................................................................................... 203
Table 285: FIFO Register ......................................................................................................... 204
Table 286: FIFO Register Bits .................................................................................................. 204
Table 287: PDM Clock Output Reference Table ...................................................................... 207
Table 288: PDM Operating Modes and Data Formats ............................................................. 208
Table 289: Digital Volume Control .......................................................................................... 209
Table 290: LPF Digital Filter Parameters ................................................................................. 210
Table 291: PDM Register Map ................................................................................................. 212
Table 292: PCFG Register ........................................................................................................ 213
Table 293: PCFG Register Bits ................................................................................................ 213
Table 294: VCFG Register ....................................................................................................... 215
Table 295: VCFG Register Bits ................................................................................................ 215
Table 296: FR Register ............................................................................................................. 216
Table 297: FR Register Bits ...................................................................................................... 216
Table 298: FRD Register .......................................................................................................... 217
Table 299: FRD Register Bits ................................................................................................... 217
Table 300: FLUSH Register ..................................................................................................... 217
Table 301: FLUSH Register Bits .............................................................................................. 217
Table 302: FTHR Register ........................................................................................................ 218
Table 303: FTHR Register Bits ................................................................................................ 218
Table 304: INTEN Register ...................................................................................................... 218
Table 305: INTEN Register Bits .............................................................................................. 218
Table 306: INTSTAT Register ................................................................................................. 219
Table 307: INTSTAT Register Bits .......................................................................................... 219
Table 308: INTCLR Register ................................................................................................... 220
Table 309: INTCLR Register Bits ............................................................................................ 220
Table 310: INTSET Register .................................................................................................... 220
Table 311: INTSET Register Bits ............................................................................................. 220
Table 312: Drive Strength Control Bits .................................................................................... 222
Table 313: Apollo2 MCU Pad Function Mapping ................................................................... 224
Table 315: ................................................................................................................................ 224
Table 314: Pad Function Color and Symbol Code .................................................................. 225
Table 316: Special Pad Types ................................................................................................... 225
Table 317: I2C Pullup Resistor Selection ................................................................................. 226
Table 318: IO Master 0 I2C Configuration .............................................................................. 230
Table 319: IO Master 1 I2C Configuration .............................................................................. 230
Apollo2 Datasheet
DS-A2-1p0p1 Page 18 of 548 2018 Ambiq Micro, Inc.
All rights reserved.
Table 320: IO Master 2 I2C Configuration .............................................................................. 230
Table 321: IO Master 3 I2C Configuration .............................................................................. 231
Table 322: IO Master 4 I2C Configuration .............................................................................. 231
Table 323: IO Master 5 I2C Configuration .............................................................................. 231
Table 324: IO Master 0 4-wire SPI Configuration ................................................................... 231
Table 326: IO Master 1 4-wire SPI Configuration ................................................................... 233
Table 325: IO Master 0 4-wire SPI nCE Configuration ........................................................... 233
Table 327: IO Master 1 4-wire SPI nCE Configuration ........................................................... 234
Table 328: IO Master 2 4-wire SPI Configuration ................................................................... 234
Table 329: IO Master 2 4-wire SPI nCE Configuration ........................................................... 235
Table 330: IO Master 3 4-wire SPI Configuration ................................................................... 235
Table 331: IO Master 3 4-wire SPI nCE Configuration ........................................................... 235
Table 332: IO Master 4 4-wire SPI Configuration ................................................................... 236
Table 333: IO Master 4 4-wire SPI nCE Configuration ........................................................... 236
Table 334: IO Master 5 4-wire SPI Configuration ................................................................... 237
Table 335: IO Master 5 4-wire SPI nCE Configuration ........................................................... 237
Table 336: IO Master 0 3-wire SPI Configuration ................................................................... 237
Table 337: IO Master 1 3-wire SPI Configuration ................................................................... 238
Table 338: IO Master 2 3-wire SPI Configuration ................................................................... 238
Table 339: IO Master 3 3-wire SPI Configuration ................................................................... 238
Table 340: IO Master 4 3-wire SPI Configuration ................................................................... 239
Table 341: IO Master 5 3-wire SPI Configuration ................................................................... 239
Table 342: IO Slave I2C Configuration .................................................................................... 239
Table 343: IO Slave 4-wire SPI Configuration ........................................................................ 240
Table 344: IO Slave 3-wire SPI Configuration ........................................................................ 240
Table 345: I2C Loopback ......................................................................................................... 240
Table 346: 3-wire SPI Loopback .............................................................................................. 241
Table 347: 4-wire SPI Loopback .............................................................................................. 241
Table 348: Counter/Timer Pad Configuration .......................................................................... 243
Table 350: UART0 RX Configuration ..................................................................................... 245
Table 351: UART0 RTS Configuration .................................................................................... 245
Table 349: UART0 TX Configuration ...................................................................................... 245
Table 352: UART0 CTS Configuration .................................................................................... 246
Table 355: UART1 RTS Configuration .................................................................................... 247
Table 356: UART1 CTS Configuration .................................................................................... 247
Table 353: UART1 TX Configuration ...................................................................................... 247
Table 354: UART1 RX Configuration ..................................................................................... 247
Table 358: PDM DATA Configuration .................................................................................... 249
Table 359: I2S BCLK Configuration ........................................................................................ 249
Table 360: I2S WCLK Configuration ...................................................................................... 249
Table 361: I2S DAT Configuration ......................................................................................... 249
Table 357: PDM CLK Configuration ....................................................................................... 249
Table 362: CLKOUT Configuration ......................................................................................... 250
Table 363: 32kHz CLKOUT Configuration ............................................................................. 250
Table 364: ADC Analog Input Configuration .......................................................................... 250
Table 365: ADC Trigger Input Configuration .......................................................................... 251
Apollo2 Datasheet
DS-A2-1p0p1 Page 19 of 548 2018 Ambiq Micro, Inc.
All rights reserved.
Table 366: Voltage Comparator Reference Configuration ....................................................... 251
Table 367: Voltage Comparator Input Configuration ............................................................... 252
Table 368: SWO Configuration ................................................................................................ 252
Table 369: GPIO Register Map ................................................................................................ 253
Table 370: PADREGA Register ............................................................................................... 255
Table 371: PADREGA Register Bits ........................................................................................ 255
Table 372: PADREGB Register ............................................................................................... 257
Table 373: PADREGB Register Bits ........................................................................................ 258
Table 374: PADREGC Register ............................................................................................... 260
Table 375: PADREGC Register Bits ........................................................................................ 260
Table 376: PADREGD Register ............................................................................................... 263
Table 377: PADREGD Register Bits ........................................................................................ 263
Table 378: PADREGE Register ............................................................................................... 265
Table 379: PADREGE Register Bits ........................................................................................ 265
Table 380: PADREGF Register ................................................................................................ 268
Table 381: PADREGF Register Bits ........................................................................................ 268
Table 382: PADREGG Register ............................................................................................... 270
Table 383: PADREGG Register Bits ........................................................................................ 271
Table 384: PADREGH Register ............................................................................................... 273
Table 385: PADREGH Register Bits ........................................................................................ 274
Table 386: PADREGI Register ................................................................................................. 276
Table 387: PADREGI Register Bits ......................................................................................... 276
Table 388: PADREGJ Register ................................................................................................ 278
Table 389: PADREGJ Register Bits ......................................................................................... 279
Table 390: PADREGK Register ............................................................................................... 281
Table 391: PADREGK Register Bits ........................................................................................ 281
Table 392: PADREGL Register ............................................................................................... 284
Table 393: PADREGL Register Bits ........................................................................................ 284
Table 394: PADREGM Register .............................................................................................. 287
Table 395: PADREGM Register Bits ....................................................................................... 287
Table 396: CFGA Register ....................................................................................................... 288
Table 397: CFGA Register Bits ................................................................................................ 289
Table 398: CFGB Register ....................................................................................................... 291
Table 399: CFGB Register Bits ................................................................................................ 291
Table 400: CFGC Register ....................................................................................................... 294
Table 401: CFGC Register Bits ................................................................................................ 294
Table 402: CFGD Register ....................................................................................................... 296
Table 403: CFGD Register Bits ................................................................................................ 297
Table 404: CFGE Register ........................................................................................................ 299
Table 405: CFGE Register Bits ................................................................................................ 300
Table 406: CFGF Register ........................................................................................................ 302
Table 407: CFGF Register Bits ................................................................................................ 303
Table 408: CFGG Register ....................................................................................................... 305
Table 409: CFGG Register Bits ................................................................................................ 306
Table 410: PADKEY Register .................................................................................................. 306
Table 411: PADKEY Register Bits .......................................................................................... 307
Apollo2 Datasheet
DS-A2-1p0p1 Page 20 of 548 2018 Ambiq Micro, Inc.
All rights reserved.
Table 412: RDA Register ......................................................................................................... 307
Table 413: RDA Register Bits .................................................................................................. 307
Table 414: RDB Register .......................................................................................................... 307
Table 415: RDB Register Bits .................................................................................................. 308
Table 416: WTA Register ......................................................................................................... 308
Table 417: WTA Register Bits ................................................................................................. 308
Table 418: WTB Register ......................................................................................................... 308
Table 419: WTB Register Bits .................................................................................................. 309
Table 420: WTSA Register ....................................................................................................... 309
Table 421: WTSA Register Bits ............................................................................................... 309
Table 422: WTSB Register ....................................................................................................... 309
Table 423: WTSB Register Bits ............................................................................................... 310
Table 424: WTCA Register ...................................................................................................... 310
Table 425: WTCA Register Bits ............................................................................................... 310
Table 426: WTCB Register ...................................................................................................... 310
Table 427: WTCB Register Bits ............................................................................................... 311
Table 428: ENA Register .......................................................................................................... 311
Table 429: ENA Register Bits .................................................................................................. 311
Table 430: ENB Register .......................................................................................................... 311
Table 431: ENB Register Bits .................................................................................................. 312
Table 432: ENSA Register ....................................................................................................... 312
Table 433: ENSA Register Bits ................................................................................................ 312
Table 434: ENSB Register ........................................................................................................ 312
Table 435: ENSB Register Bits ................................................................................................ 313
Table 436: ENCA Register ....................................................................................................... 313
Table 437: ENCA Register Bits ................................................................................................ 313
Table 438: ENCB Register ....................................................................................................... 313
Table 439: ENCB Register Bits ................................................................................................ 314
Table 440: STMRCAP Register ............................................................................................... 314
Table 441: STMRCAP Register Bits ........................................................................................ 314
Table 442: IOM0IRQ Register ................................................................................................. 315
Table 443: IOM0IRQ Register Bits .......................................................................................... 315
Table 444: IOM1IRQ Register ................................................................................................. 316
Table 445: IOM1IRQ Register Bits .......................................................................................... 316
Table 446: IOM2IRQ Register ................................................................................................. 316
Table 447: IOM2IRQ Register Bits .......................................................................................... 316
Table 448: IOM3IRQ Register ................................................................................................. 317
Table 449: IOM3IRQ Register Bits .......................................................................................... 317
Table 450: IOM4IRQ Register ................................................................................................. 317
Table 451: IOM4IRQ Register Bits .......................................................................................... 317
Table 452: IOM5IRQ Register ................................................................................................. 318
Table 453: IOM5IRQ Register Bits .......................................................................................... 318
Table 454: LOOPBACK Register ............................................................................................ 318
Table 455: LOOPBACK Register Bits ..................................................................................... 318
Table 456: GPIOOBS Register ................................................................................................. 319
Table 457: GPIOOBS Register Bits ......................................................................................... 319
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