TI DRV8305-Q1：高性能三相汽车智能栅极驱动器

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TI-DRV8305-Q1是一款专为汽车应用设计的高性能三相 brushless gate driver，它符合严格的AEC-Q100标准，确保在极端环境下也能稳定运行。这款驱动器适用于工作电压范围广泛，从4.4V到45V，具备强大的功能特性： 1. **高可靠性和温度适应性**：该驱动器支持两种温度等级，温度等级0(E)适用于–40°C至+150°C，而温度等级1(Q)适合–40°C至+125°C，确保在严苛的汽车环境中仍能保持正常性能。 2. **强大的栅极驱动**：DRV8305-Q1提供了1.25A和1A的峰值栅极驱动电流，采用智能IDRIVE和TDRIVE架构，实现高效的电流控制和保护功能。 3. **可编程压摆率**：用户可以调整高压侧和低压侧的压摆率，以优化电机响应和效率。 4. **集成电荷泵**：支持100%占空比，提高了驱动能力，特别适合高频率操作。 5. **多功能分流放大器**：内置三个分流放大器，有助于电流检测和反馈控制。 6. **电源管理**：50mA的集成LDO（可选3.3V和5V），为电路提供稳定的电源，并提供5V选项。 7. **高精度输入控制**：支持高达200kHz的3PWM或6PWM输入，允许灵活的电机控制方式。 8. **高级控制模式**：支持单PWM模式换向，以及通过SPI接口进行设备配置和故障报告，增强了系统的可编程性。 9. **封装与保护**：48引脚HTQFP封装，提供了耐热设计。内置故障诊断、死区时间控制、MOSFET保护机制、VDS过流监测、栅极驱动器故障检测等保护功能，确保系统安全。 10. **附加特性**：包括电池反向保护和跛行回家模式，以及过热警告，提升了系统的全面保护和恢复能力。 TI-DRV8305-Q1是一款高度集成且功能强大的三相汽车级PWM驱动器，适用于对性能、可靠性及安全有极高要求的电动汽车和工业自动化应用。在设计过程中，务必参考最新的英文数据手册SLVSD12获取最准确的信息。

DRV8305-Q1

ZHCSF68D –MAY 2015–REVISED JULY 2019

www.ti.com.cn

Electrical Characteristics (continued)

PVDD = 4.4 to 45 V, DRV8305xQ: T

= –40°C to 150° C, DRV8305xE: T

= –40°C to 175°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

DRIVEN_LS

Low-side peak sink current

IDRIVEN_LS = 0000 0.02 A

IDRIVEN_LS = 0001 0.03 A

IDRIVEN_LS = 0010 0.04 A

IDRIVEN_LS = 0011 0.05 A

IDRIVEN_LS = 0100 0.06 A

IDRIVEN_LS = 0101 0.07 A

IDRIVEN_LS = 0110 0.08 A

IDRIVEN_LS = 0111 0.25 A

IDRIVEN_LS = 1000 0.5 A

IDRIVEN_LS = 1001 0.75 A

IDRIVEN_LS = 1010 1 A

IDRIVEN_LS = 1011 1.25 A

IDRIVEN_LS = 1100, 1101, 1110,

1111

0.06 A

PASSIVE GATE PULLDOWN (GHx, GLx)

SLEEP_PD

Gate pulldown resistance,

sleep mode

EN_GATE = LOW; GHx to GND; 1000 Ω

EN_GATE = LOW; GLx to GND; 500 Ω

STANDBY_PD

Gate pulldown resistance,

standby mode

EN_GATE = LOW; GHx to GND; 1000 Ω

EN_GATE = LOW; GLx to GND; 500 Ω

ACTIVE GATE PULLDOWN (GHx, GLx)

HOLD

Gate pulldown current,

holding

EN_GATE = HIGH;

GHx to SHx; GLx to SLx

50 mA

STRONG

Gate pulldown current,

strong

EN_GATE = HIGH;

GHx to SHx; GLx to SLx

1.25 A

GATE TIMING

pd_lf-O

Positive input falling to

GHS_x falling

PVDD = 12 V; CL = 1 nF; 50% to 50% 200 ns

pd_lr-O

Positive input rising to

GHS_x rising

PVDD = 12 V; CL = 1 nF; 50% to 50% 200 ns

d_min

Minimum dead time after

hand shaking

280 ns

dtp

Dead time in addition to

d_min

DEAD_TIME = 000 35 ns

DEAD_TIME = 001 52 ns

DEAD_TIME = 010 88 ns

DEAD_TIME = 011 440 ns

DEAD_TIME = 100 880 ns

DEAD_TIME = 101 1760 ns

DEAD_TIME = 110 3520 ns

DEAD_TIME = 111 5280 ns

PD_MATCH

Propagation delay matching

between high-side and low-

side

50 ns

DT_MATCH

Dead-time matching 50 ns

DRV8305-Q1

www.ti.com.cn

ZHCSF68D –MAY 2015–REVISED JULY 2019

Electrical Characteristics (continued)

PVDD = 4.4 to 45 V, DRV8305xQ: T

= –40°C to 150° C, DRV8305xE: T

= –40°C to 175°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

CURRENT SHUNT AMPLIFIER

CSA

Current sense amplifier

gain

GAIN_CSx = 00 10 V/V

GAIN_CSx = 01 19.9 V/V

GAIN_CSx = 10 39.8 V/V

GAIN_CSx = 11 78.8 V/V

ERR

Current sense amplifier

gain error

Input differential > 0.025 V;

= –40 to 150 °C

–3.5 3.5 %

Input differential > 0.025 V;

= 150 to 175 °C

–4 4 %

SETTLING

Current sense amplifier

settling time

Settling time to 1%; no blanking;

CSA

= 10; Vstep = 0.46 V

300 ns

Settling time to 1%; no blanking;

CSA

= 20; Vstep = 0.46 V

600 ns

Settling time to 1%; no blanking;

CSA

= 40; Vstep = 0.46 V

1.2 µs

Settling time to 1%; no blanking;

CSA

= 80; Vstep = 0.46 V

2.4 µs

IOS

DC input offset G

CSA

= 10; input shorted; RTI –4 4 mV

VREF_ERR

Reference buffer error (DC)

Internal or external VREF;

VREF_SCALE = 01

–3 3 %

Internal or external VREF;

VREF_SCALE = 10

–4 4 %

Internal or external VREF;

VREF_SCALE = 11

–10 10 %

DRIFTOS

Input offset error drift G

CSA

= 10; input shorted; RTI 10 µV/C

BIAS

Input bias current VIN_COM = 0; SOx open 100 µA

OFFSET

Input bias current offset

IBIAS (SNx-SPx); VIN_COM = 0;

SOx open

1 µA

IN_COM

Common input mode range –0.15 0.15 V

IN_DIFF

Differential input range –0.48 0.48 V

CMRR

Common mode rejection

ration

External input resistance matched;

DC; GCSA = 10

60 80 dB

External input resistance matched;

20 kHz; GCSA = 10

60 80 dB

PSRR Power supply rejection ratio

DC (<120 Hz); GCSA = 10 150 dB

20 kHz; GCSA = 10 90 dB

SWING

Output voltage swing PVDD > 5.3 V 0.3 4.7 V

SLEW

Output slew rate GCSA = 10; R

= 0 Ω; CL = 60 pF 5.2 10 V/µs

Output short circuit current SOx shorted to ground 20 mA

UGB

Unity gain bandwidth

product

GCSA = 10 2 MHz

VOLTAGE PROTECTION

AVDD_UVLO

AVDD undervoltage fault AVDD falling, relative to GND 3.3 3.7 V

VREG_UV

VREG undervoltage fault

VREG_UV_LEVEL = 00 VREG × 0.9 V

VREG_UV_LEVEL = 01 VREG × 0.8 V

VREG_UV_LEVEL = 10 VREG × 0.7 V

VREG_UV_LEVEL = 11 VREG × 0.7 V

VREG_UV_DGL

VREG undervoltage

monitor deglitch time

1.5 2 µs

DRV8305-Q1

ZHCSF68D –MAY 2015–REVISED JULY 2019

www.ti.com.cn

Electrical Characteristics (continued)

PVDD = 4.4 to 45 V, DRV8305xQ: T

= –40°C to 150° C, DRV8305xE: T

= –40°C to 175°C (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

(1) Specified by design.

(2) Overtemperature shutdown (OTSD) is disabled by default for DRV8305xEPHPQ1 and may only be re-enabled through control register.

PVDD_UVFL

Undervoltage protection

warning, PVDD

PVDD falling 7.7 8.1 V

PVDD rising 7.9 8.3 V

PVDD_UVLO1

Undervoltage protection

lock out, PVDD

PVDD falling 4.1 V

PVDD rising 4.3 V

PVDD_UVLO2

Undervoltage protection

fault, PVDD

PVDD falling 4.2 4.4 V

PVDD rising 4.4 4.7 V

PVDD_OVFL

Overvoltage protection

warning, PVDD

PVDD falling 33.5 36 V

PVDD rising 32.5 35 V

VCPH_UVFL

Charge pump undervoltage

protection warning, VCPH

VCPH falling, relative to PVDD 8 V

VCPH_UVLO2

Charge pump undervoltage

protection fault, VCPH

VCPH falling, relative to PVDD,

SET_VCPH_UV = 0

4.6 5.3 V

VCPH falling, relative to PVDD,

SET_VCPH_UV = 1

4.3 5 V

VCP_LSD_UVLO2

Low-side regulator

undervoltage fault,

VCP_LSD

VCP_LSD falling, relative to GND 6.4 7.5 V

VCPH_OVLO

Charge pump overvoltage

protection fault, VCPH

Relative to PVDD 14 18 V

VCPH_OVLO_ABS

Charge pump overvoltage

protection fault, VCPH

Relative to GND 60 V

TEMPERATURE PROTECTION

OTW_CLR

Junction temperature-to

clear overtemperature

(OTW) warning

(1)

100 130 150 °C

OTW_SET

Junction temperature for

overtemperature (OTW)

warning

(1)

135 160 185 °C

OTSD_CLR

Junction temperature-to-

clear overtemperature

shutdown (OTSD)

(1)

125 155 180 °C

OTSD_SET

(2)

Junction temperature for

overtemperature shutdown

(OTSD)

(1)

160 185 210 °C

TEMP_FLAG1

Junction temperature flag

setting 1

(1)

105 °C

TEMP_FLAG2

Junction temperature flag

setting 2

(1)

125 °C

TEMP_FLAG3

Junction temperature flag

setting 3

(1)

135 °C

TEMP_FLAG4

Junction temperature flag

setting 4

(1)

185 °C

PROTECTION CONTROL

pd,E-L

Delay, error event to all

gates low

TBLANK = 00; TVDS = 00 1 µs

pd,E-SD

Delay, error event to

nFAULTx low

TBLANK = 00; TVDS = 00 1 µs

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