SSD1306 OLED 128*64蓝屏模块规格与更新历史
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更新于2024-07-22
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本文档主要介绍了一款名为"QG-2864KLBEG01"的OLED显示模块，该模块是一款128*64像素的蓝色OLED显示屏，由Allvision technology Inc.提供。此模块适用于产品设计，但需要注意的是，在使用前请先联系供应商以获取最新规格和授权信息。
1. OLED显示屏概述：
OLED（有机发光二极管）技术是一种自发光显示技术，与传统的LCD（液晶显示器）不同，它不需要背光源，每个像素单元都可以独立控制亮度。这款128*64的OLED模块提供清晰的图像显示，其特点是色彩鲜艳、对比度高、响应速度快，特别适合于节能和需要高视觉效果的应用场景。
2. 版本更新记录：
文档中的"Ver:C"表示当前版本，之后列出了几次修订内容。在2013年2月25日B版中，RIREF参数从390K更改为910K，这一变更可能影响到显示屏的亮度控制。在后续的修订中，如2013年5月22日C版，亮度寄存器的参数0X66又被改回0XCF，而在同年5月29日的版本中，0xD9寄存器的参数0x1F被更新为0xF1。这些变化可能是为了优化显示性能或兼容性。
3. 显示规格：
1.1 显示规格部分详细描述了模块的分辨率（128*64像素），这决定了能显示的字符数或者图像区域大小。蓝光OLED的特点使其在暗环境下也能提供良好的可见性，对于户外或低光环境的应用尤其适用。
4. 机械规格：
1.2 部分涉及模块的物理尺寸、厚度、引脚布局以及连接方式等机械特性，这对于设计者来说是选择和集成显示屏时的重要参考，确保它能适配各种硬件平台。
5. 活动区域/内存映射：
1.3 这部分可能包括了显示屏的像素阵列如何在内存中进行组织和寻址，这对于编写驱动程序和控制软件至关重要，因为程序员需要了解如何有效地访问和控制每一个像素。
这份文档为使用这款Allvision QG-2864KLBEG01 OLED显示屏提供了基础的规格信息和重要注意事项。设计师在采用这款产品时，务必查阅最新的规格和更新，以确保产品性能和兼容性。同时，也要关注知识产权和可能产生的问题，避免潜在的法律风险。
3
1.5 Pin Definition
Pin Number Symbol I/O Function
P
P
o
o
w
w
e
e
r
r
S
S
u
u
p
p
p
p
l
l
y
y
9 VDD P
P
P
o
o
w
w
e
e
r
r
S
S
u
u
p
p
p
p
l
l
y
y
f
f
o
o
r
r
L
L
o
o
g
g
i
i
c
c
This is a voltage supply pin. It must be connected to external source.
8 VSS P
G
G
r
r
o
o
u
u
n
n
d
d
o
o
f
f
L
L
o
o
g
g
i
i
c
c
C
C
i
i
r
r
c
c
u
u
i
i
t
t
This is a
g
round pin. It acts as a reference for the lo
g
ic pins. It must be
connected to external ground.
28 VCC P
P
P
o
o
w
w
e
e
r
r
S
S
u
u
p
p
p
p
l
l
y
y
f
f
o
o
r
r
O
O
E
E
L
L
P
P
a
a
n
n
e
e
l
l
This is the most positive voltage supply pin of the chip. A stabilization capacitor
should be connected between this pin and V
SS
when the converter is used. I
t
must be connected to external source when the converter is not used.
29 VLSS P
G
G
r
r
o
o
u
u
n
n
d
d
o
o
f
f
A
A
n
n
a
a
l
l
o
o
g
g
C
C
i
i
r
r
c
c
u
u
i
i
t
t
This is an analog ground pin. It should be connected to V
SS
externally.
D
D
r
r
i
i
v
v
e
e
r
r
26 IREF I
C
C
u
u
r
r
r
r
e
e
n
n
t
t
R
R
e
e
f
f
e
e
r
r
e
e
n
n
c
c
e
e
f
f
o
o
r
r
B
B
r
r
i
i
g
g
h
h
t
t
n
n
e
e
s
s
s
s
A
A
d
d
j
j
u
u
s
s
t
t
m
m
e
e
n
n
t
t
This pin is se
g
ment current reference pin. A resistor should be connected
between this pin and V
SS
. Set the current at 12.5A maximum.
27 VCOMH O
V
V
o
o
l
l
t
t
a
a
g
g
e
e
O
O
u
u
t
t
p
p
u
u
t
t
H
H
i
i
g
g
h
h
L
L
e
e
v
v
e
e
l
l
f
f
o
o
r
r
C
C
O
O
M
M
S
S
i
i
g
g
n
n
a
a
l
l
This pin is the input pin for the volta
g
e output hi
g
h level for COM si
g
nals.
A
capacitor should be connected between this pin and V
SS
.
D
D
C
C
/
/
D
D
C
C
C
C
o
o
n
n
v
v
e
e
r
r
t
t
e
e
r
r
6 VBAT P
P
P
o
o
w
w
e
e
r
r
S
S
u
u
p
p
p
p
l
l
y
y
f
f
o
o
r
r
D
D
C
C
/
/
D
D
C
C
C
C
o
o
n
n
v
v
e
e
r
r
t
t
e
e
r
r
C
C
i
i
r
r
c
c
u
u
i
i
t
t
This is the power supply pin for the internal buffer of the DC/DC volta
g
e converter.
It must be connected to external source when the converter is used. It should be
connected to V
DD
when the converter is not used.
4 / 5
2 / 3
C1P / C1N
C2P / C2N
I
P
P
o
o
s
s
i
i
t
t
i
i
v
v
e
e
T
T
e
e
r
r
m
m
i
i
n
n
a
a
l
l
o
o
f
f
t
t
h
h
e
e
F
F
l
l
y
y
i
i
n
n
g
g
I
I
n
n
v
v
e
e
r
r
t
t
i
i
n
n
g
g
C
C
a
a
p
p
a
a
c
c
i
i
t
t
o
o
r
r
N
N
e
e
g
g
a
a
t
t
i
i
v
v
e
e
T
T
e
e
r
r
m
m
i
i
n
n
a
a
l
l
o
o
f
f
t
t
h
h
e
e
F
F
l
l
y
y
i
i
n
n
g
g
B
B
o
o
o
o
s
s
t
t
C
C
a
a
p
p
a
a
c
c
i
i
t
t
o
o
r
r
The charge-pump capacitors are required between the terminals. They must be
floated when the converter is not used.
I
I
n
n
t
t
e
e
r
r
f
f
a
a
c
c
e
e
10
11
12
BS0
BS1
BS2
I
C
C
o
o
m
m
m
m
u
u
n
n
i
i
c
c
a
a
t
t
i
i
n
n
g
g
P
P
r
r
o
o
t
t
o
o
c
c
o
o
l
l
S
S
e
e
l
l
e
e
c
c
t
t
These pins are MCU interface selection input. See the following table:
BS0 BS1 BS2
I
2
C 0 1 0
3-wire SPI 1 0 0
4-wire SPI 0 0 0
8-bit 68XX Parallel 0 0 1
8-bit 80XX Parallel 0 1 1
14 RES# I
P
P
o
o
w
w
e
e
r
r
R
R
e
e
s
s
e
e
t
t
f
f
o
o
r
r
C
C
o
o
n
n
t
t
r
r
o
o
l
l
l
l
e
e
r
r
a
a
n
n
d
d
D
D
r
r
i
i
v
v
e
e
r
r
This pin is reset si
g
nal input. When the pin is low, initialization of the chip is
executed. Keep this pin pull high during normal operation.
13 CS# I
C
C
h
h
i
i
p
p
S
S
e
e
l
l
e
e
c
c
t
t
This pin is the chip select input. The chip is enabled for MCU communication only
when CS# is pulled low.
15 D/C# I
D
D
a
a
t
t
a
a
/
/
C
C
o
o
m
m
m
m
a
a
n
n
d
d
C
C
o
o
n
n
t
t
r
r
o
o
l
l
This pin is Data/Command control pin. When the pin is pulled hi
g
h, the input a
t
D7~D0 is treated as display data. When the pin is pulled low, the input at D7~D0
will be transferred to the command register.
When the pin is pulled hi
g
h and serial interface mode is selected, the data at SDIN
will be interpreted as data. When it is pulled low, the data at SDIN will be
transferred to the command register. In I
2
C mode, this pin acts as SA0 for slave
address selection.
For detail relationship to MCU interface si
g
nals, please refer to the Timin
g
Characteristics Diagrams.
17 E/RD# I
R
R
e
e
a
a
d
d
/
/
W
W
r
r
i
i
t
t
e
e
E
E
n
n
a
a
b
b
l
l
e
e
o
o
r
r
R
R
e
e
a
a
d
d
This pin is MCU interface input. When interfacing to a 68XX-series
microprocessor, this pin will be used as the Enable (E) si
g
nal. Read/write operation
is initiated when this pin is pulled high and the CS# is pulled low.
When connecting to an 80XX-microprocessor, this pin receives the Read (RD#)
signal. Data read operation is initiated when this pin is pulled low and CS# is
pulled low.
When serial or I
2
C mode is selected, this pin must be connected to V
SS
.
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