JENNIC J5148超低功耗802.15.4微控制器详细资料

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JENNIC的J5148芯片是一款专为ZigBee PRO网络应用设计的超低功耗、高性能无线微控制器。该芯片的关键特性如下： 1. **处理器架构**: J5148搭载了一款增强型32位RISC处理器，其设计独特，具有可变宽度指令集，这显著提升了编码效率。通过多级指令流水线和可编程时钟速度，它能够在保持高性能的同时实现低功耗操作。 2. **无线通信模块**: 该芯片内置一个符合IEEE 802.15.4标准的2.4GHz收发器，支持ZigBee PRO协议，是构建无线传感器网络或物联网设备的理想选择。 3. **存储容量**: J5148配备了128KB的程序存储器（ROM）和128KB的数据存储器（RAM），为运行网络栈如ZigBee PRO协议栈，以及嵌入式应用程序提供了足够的内存空间。这使得设备可以在单片机模式下同时处理多个任务。 4. **低功耗与电源管理**: 操作电流低至18mA，使得芯片可以直接由一枚纽扣电池供电，特别适合能源受限的应用场景。 5. **增强型外设**： - **脉冲计数器**：在睡眠模式下运行，专为自动测量报告（AMR）应用中的脉冲计数设计，提供精确的数据采集能力。 - **时间对齐飞行（ToF）引擎**：这是一种独特的功能，允许在无线传感器网络上实现精确的位置服务，增强了设备的空间定位能力。 - **音频接口**：集成4线I2S音频接口，为音频数据传输和处理提供了方便，支持音频相关应用。 6. **灵活性与应用范围**：J5148的大内存容量使其能够灵活地运行网络堆栈和嵌入式应用，适用于各种物联网设备，如智能家居、工业监控、环境监测等场景。 JENNIC的J5148芯片凭借其强大的处理性能、低功耗特性和丰富的外围设备，为构建高效、节能的无线物联网解决方案提供了强大的硬件基础。对于开发者而言，这是一款理想的无线控制器，能够满足多种应用场景的需求。

Jennic

16 JN-DS-JN5148-001 1v3 © Jennic 2010

Preliminary

4 Memory Organisation

This section describes the different memories found within the JN5148. The device contains ROM, RAM, OTP eFuse

memory, the wireless transceiver and peripherals all within the same linear address space.

0x00000000

0x00020000

RAM

(128kB)

0xF0000000

0xFFFFFFFF

Unpopulated

ROM

(128kB)

0xF0020000

RAM Echo

0x04000000

Peripherals

0x02000000

Figure 5: JN5148 Memory Map

4.1 ROM

The ROM is 128k bytes in size, and can be accessed by the processor in a single CPU clock cycle. The ROM

contents include bootloader to allow external Flash memory contents to be bootloaded into RAM at runtime, a default

interrupt vector table, an interrupt manager, IEEE802.15.4 MAC and APIs for interfacing on-chip peripherals. The

operation of the boot loader is described in detail in Application Note

[7]. The interrupt manager routes interrupt calls

to the application’s soft interrupt vector table contained within RAM. Section

7 contains further information regarding

the handling of interrupts. ROM contents are shown in

Figure 6.

Interrupt Vectors

Interrupt Manager

Boot Loader

IEEE802.15.4

Stack

0x00000000

0x00020000

APIs

Spare

Figure 6: Typical ROM contents

Jennic

18 JN-DS-JN5148-001 1v3 © Jennic 2010

Preliminary

At reset, the contents of this memory are copied into RAM by the software boot loader. The Flash memory devices

that are supported as standard through the JN5148 bootloader are given in Table 1. Jennic recommends that where

possible one of these devices should be selected.

Manufacturer Device Number

SST (Silicon Storage Technology) 25VF010A (1Mbit device)

Numonyx M25P10-A (1Mbit device),

M25P40 (4Mbit device)

Table 1: Supported Flash Memories

Applications wishing to use an alternate Flash memory device should refer to application note [2] JN-AN-1038

Programming Flash devices not supported by the JN51xx ROM-based bootloader. This application note provides

guidance on developing an interface to an alternate device.

4.4.1 External Memory Encryption

The contents of the external serial memory may be encrypted. The AES security processor combined with a user

programmable 128-bit encryption key is used to encrypt the contents of the external memory. The encryption key is

stored in eFuse.

When bootloading program code from external serial memory, the JN5148 automatically accesses the encryption key

to execute the decryption process. User program code does not need to handle any of the decryption process; it is

transparent.

With encryption enabled, the time taken to boot code from external flash is increased.

4.5 Peripherals

All peripherals have their registers mapped into the memory space. Access to these registers requires 3 clock

cycles. Applications have access to the peripherals through the software libraries that present a high-level view of

the peripheral’s functions through a series of dedicated software routines. These routines provide both a tested

method for using the peripherals and allow bug-free application code to be developed more rapidly. For details, see

the Integrated Peripherals API Reference Manual (JN-RM-2001).[5]

4.6 Unused Memory Addresses

Any attempt to access an unpopulated memory area will result in a bus error exception (interrupt) being generated.

Jennic

Preliminary

5 System Clocks

Two system clocks are used to provide timing references into the on-chip subsystems of the JN5148. A 16MHz clock,

generated by a crystal-controlled 32MHz oscillator, is used by the transceiver, processor, memory and digital and

analogue peripherals. A 32kHz clock is used by the sleep timer and during the startup phase of the chip.

5.1 16MHz System Clock

The 16MHz system clock is used by the digital and analogue peripherals and the transceiver. A scaled version

(4,8,16 or 32MHz) of this clock is also used by the processor and memories. For most operations it is necessary to

source this clock from the 32MHz oscillator.

Crystal oscillators are generally slow to start. Hence to provide a faster start-up following a sleep cycle a fast RC

oscillator is provided that can be used as the source for the 16MHz system clock. The oscillator starts very quickly

and is typically 24MHz causing the system clock to run at 12MHz. Using a clock of this speed scales down the speed

of the processor and any peripherals in use. For the SPI interface this causes no functional issues as the generated

SPI clock is slightly slower and is used to clock the external SPI slave. Use of the radio is not possible when using the

24MHz RC oscillator. Additionally, timers and UARTs should not be used as the exact frequency will not be known.

The JN5148 device can be configured to wake up from sleep using the fast RC oscillator and automatically switch

over to use the 32MHz xtal as the clock source, when it has started up. This could allow application code to be

downloaded from the flash before the xtal is ready, typically improving start-up time by 550usec. Alternatively, the

switch over can be controlled by software, or the system could always use the 32MHz oscillator as the clock source.

5.1.1 32MHz Oscillator

The JN5148 contains the necessary on chip components to build a 32MHz reference oscillator with the addition of an

external crystal resonator and two tuning capacitors. The schematic of these components are shown in

Figure 9.

The two capacitors, C1 and C2, should typically be 15pF and use a COG dielectric. Due to the small size of these

capacitors, it is important to keep the traces to the external components as short as possible. The on chip

transconductance amplifier is compensated for temperature variation, and is self-biasing by means of the internal

resistor R1. The electrical specification of the oscillator can be found in section 22.3.13. Please refer to Appendix B

for development support with the crystal oscillator circuit.

XTALOUT

C2 C1

XTALIN

JN5148

Figure 9: 32MHz Crystal Oscillator Connections

5.1.2 24MHz RC Oscillator

An on-chip 24MHz RC oscillator is provided. No external components are required for this oscillator. The electrical

specification of the oscillator can be found in section

22.3.14.

Jennic

Preliminary

5.2 32kHz System Clock

The 32kHz system clock is used for timing the length of a sleep period (see section 21 Power Management and

Sleep Modes) and also to generate the system clock used internally during reset. The clock can be selected from

one of three sources through the application software:

•

32kHz RC Oscillator

•

32kHz Crystal Oscillator

• 32kHz External Clock

Upon a chip reset or power-up the JN5148 defaults to using the internal 32kHz RC Oscillator. If another clock source

is selected then it will remain in use for all 32kHz timing until a chip reset is performed.

5.2.1 32kHz RC Oscillator

The internal 32kHz RC oscillator requires no external components. The internal timing components of the oscillator

have a wide tolerance due to manufacturing process variation and so the oscillator runs nominally at 32kHz ±30%. To

make this useful as a timing source for accurate wakeup from sleep, a frequency calibration factor derived from the

more accurate 16MHz clock may be applied. The calibration factor is derived through software, details can be found

in section 11.3.1. For detailed electrical specifications, see section 22.3.11.

5.2.2 32kHz Crystal Oscillator

In order to obtain more accurate sleep periods, the JN5148 contains the necessary on-chip components to build a

32kHz oscillator with the addition of an external 32.768kHz crystal and two tuning capacitors. The crystal should be

connected between 32KXTALIN and 32KXTALOUT (DIO9 and DIO10), with two equal capacitors to ground, one on

each pin. Due to the small size of the capacitors, it is important to keep the traces to the external components as

short as possible.

The electrical specification of the oscillator can be found in section 22.3.12. The oscillator cell is flexible and can

operate with a range of commonly available 32.768kHz crystals with load capacitances from 6 to 12.5pF. However,

the maximum ESR of the crystal and the supply current are both functions of the actual crystal used, see appendix

B.1 for more details.

32KXTALOUT 32KXTALIN

JN5148

Figure 10: 32kHz crystal oscillator connections

5.2.3 32kHz External Clock

An externally supplied 32kHz reference clock on the 32KIN input (DIO9) may be provided to the JN5148. This would

allow the 32kHz system clock to be sourced from a very stable external oscillator module, allowing more accurate

sleep cycle timings compared to the internal RC oscillator. (See section

22.2.3 I/O Characteristics, DIO9 is a 3V

tolerant input)

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