![](https://csdnimg.cn/release/download_crawler_static/66752195/bg13.jpg)
18
Copyright © 2019 IEEE. All rights reserved.
132.1.5 Allocation of functions ...................................................................................................... 126
132.1.6 50GMII structure ............................................................................................................... 126
132.1.7 Mapping of 50GMII signals to PLS service primitives..................................................... 126
132.2 50GMII data stream .................................................................................................................... 126
132.3 50GMII functional specifications ............................................................................................... 126
132.4 LPI assertion and detection......................................................................................................... 126
132.5 Protocol implementation conformance statement (PICS) proforma for Clause 132,
Reconciliation Sublayer (RS) and Media Independent Interface (50GMII) for 50 Gb/s
operation ................................................................................................................................... 127
132.5.1 Introduction........................................................................................................................ 127
132.5.2 Identification...................................................................................................................... 127
132.5.2.1 Implementation identification................................................................................... 127
132.5.2.2 Protocol summary..................................................................................................... 127
132.5.2.3 Major capabilities/options ........................................................................................ 128
132.5.3 PICS proforma tables for Reconciliation Sublayer (RS) and Media Independent
Interface (50GMII) for 50 Gb/s operation ........................................................................ 128
132.5.3.1 General ..................................................................................................................... 128
132.5.3.2 Mapping of PLS service primitives .......................................................................... 128
133. Physical Coding Sublayer (PCS) for 64B/66B, type 50GBASE-R .................................................... 129
133.1 Overview..................................................................................................................................... 129
133.1.1 Scope.................................................................................................................................. 129
133.1.2 Relationship of 50GBASE-R to other standards ............................................................... 129
133.1.3 Summary of 50GBASE-R sublayers ................................................................................. 129
133.1.3.1 Physical Coding Sublayer (PCS) .............................................................................. 129
133.1.4 Inter-sublayer interfaces .................................................................................................... 129
133.1.4.1 PCS service interface (50GMII) ............................................................................... 129
133.1.4.2 Forward Error Correction (FEC) or Physical Medium Attachment (PMA)
service interface ...................................................................................................... 130
133.1.5 Functional block diagram .................................................................................................. 131
133.2 Physical Coding Sublayer (PCS) ................................................................................................ 132
133.2.1 Functions within the PCS .................................................................................................. 132
133.2.2 Alignment marker insertion............................................................................................... 132
133.2.3 PCS lane deskew................................................................................................................ 133
133.2.4 Detailed functions and state diagrams ............................................................................... 133
133.3 Delay constraints......................................................................................................................... 133
133.4 Auto-Negotiation ........................................................................................................................ 133
133.5 Protocol implementation conformance statement (PICS) proforma for Clause 133, Physical
Coding Sublayer (PCS) for 64B/66B, type 50GBASE-R......................................................... 134
133.5.1 Introduction........................................................................................................................ 134
133.5.2 Identification...................................................................................................................... 134
133.5.2.1 Implementation identification................................................................................... 134
133.5.2.2 Protocol summary..................................................................................................... 134
133.5.3 Major capabilities/options.................................................................................................. 135
133.5.4 PICS proforma tables for Physical Coding Sublayer (PCS) for 64B/66B, type
50GBASE-R ..................................................................................................................... 135
133.5.4.1 Coding rules.............................................................................................................. 135
133.5.4.2 Scrambler and Descrambler...................................................................................... 136
133.5.4.3 Deskew and Reordering............................................................................................ 136
133.5.4.4 Alignment Markers ................................................................................................... 136
133.5.4.5 Test-pattern modes.................................................................................................... 136
133.5.4.6 Bit order .................................................................................................................... 137
133.5.4.7 Management.............................................................................................................. 137
Authorized licensed use limited to: ping cai. Downloaded on December 18,2021 at 09:12:38 UTC from IEEE Xplore. Restrictions apply.