S5PV210_LAYOUT_GUIDE_ REV 0.1
Table of Contents
1. Land size ................................................................................................................................................... 5
2. Via hole...................................................................................................................................................... 6
3. Stack-up Reference................................................................................................................................... 7
4. Patterns Routing........................................................................................................................................ 8
4.1. Trace Width & Clearance .............................................................................................................. 8
4.2. Transmission Line Impedance ...................................................................................................... 9
4.3 Layout For Decoupling capacitor and via hole ............................................................................... 9
4.4 Clock bus ........................................................................................................................................ 10
4.5 USB ................................................................................................................................................ 11
4.6 Memory Port1 (DRAM) ................................................................................................................... 12
4.7 HDMI............................................................................................................................................... 13
4.8 Characteristic Impedance............................................................................................................... 15
4.8.1 DRAM Memory ............................................................................................................................ 15
4.8.2 HDMI TMDS Lines....................................................................................................................... 15
4.8.3 USB ............................................................................................................................................. 15
4.8.4 MIPI ............................................................................................................................................. 15
4.8.5 HS-SPI......................................................................................................................................... 15
5. EMI design considerations ........................................................................................................................ 16
5.1 Overview......................................................................................................................................... 16
5.2 The Classification for EMC ............................................................................................................. 16
5.3. Recommendations Tips................................................................................................................ 17
6. Reflow profile (SMT).................................................................................................................................. 19
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