DRV8824
www.ti.com
SLVSA06E –OCTOBER 2009– REVISED AUGUST 2011
THERMAL INFORMATION
DRV8824
THERMAL METRIC PWP UNITS
28 PINS
θ
JA
Junction-to-ambient thermal resistance
(1)
38.9
θ
JCtop
Junction-to-case (top) thermal resistance
(2)
23.3
θ
JB
Junction-to-board thermal resistance
(3)
21.2
°C/W
ψ
JT
Junction-to-top characterization parameter
(4)
0.8
ψ
JB
Junction-to-board characterization parameter
(5)
20.9
θ
JCbot
Junction-to-case (bottom) thermal resistance
(6)
2.6
(1) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(2) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(3) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(4) The junction-to-top characterization parameter, ψ
JT
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(5) The junction-to-board characterization parameter, ψ
JB
, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θ
JA
, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
RECOMMENDED OPERATING CONDITIONS
MIN NOM MAX UNIT
V
M
Motor power supply voltage range
(1)
8.2 45 V
V
REF
VREF input voltage
(2)
1 3.5 V
I
V3P3
V3P3OUT load current 1 mA
(1) All V
M
pins must be connected to the same supply voltage.
(2) Operational at VREF between 0 V and 1 V, but accuracy is degraded.
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range of -40°C to 85°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
POWER SUPPLIES
I
VM
VM operating supply current V
M
= 24 V, f
PWM
< 50 kHz 5 8 mA
I
VMQ
VM sleep mode supply current V
M
= 24 V 10 20 μA
V
UVLO
VM undervoltage lockout voltage V
M
rising 7.8 8.2 V
V3P3OUT REGULATOR
IOUT = 0 to 1 mA, V
M
= 24 V, T
J
= 25°C 3.18 3.30 3.42
V
3P3
V3P3OUT voltage V
IOUT = 0 to 1 mA 3.10 3.30 3.50
LOGIC-LEVEL INPUTS
V
IL
Input low voltage 0.6 0.7 V
V
IH
Input high voltage 2 5.25 V
V
HYS
Input hysteresis 0.45 V
I
IL
Input low current VIN = 0 –20 20 μA
I
IH
Input high current VIN = 3.3 V 100 μA
nENBL, nRESET, DIR, STEP, MODEx 100 kΩ
R
PD
Internal pulldown resistance
nSLEEP 1 MΩ
nHOME, nFAULT OUTPUTS (OPEN-DRAIN OUTPUTS)
V
OL
Output low voltage I
O
= 5 mA 0.5 V
I
OH
Output high leakage current V
O
= 3.3 V 1 μA
DECAY INPUT
Copyright © 2009–2011, Texas Instruments Incorporated 5
剩余21页未读，继续阅读
zcw199509
- 粉丝: 1
- 资源: 3
我的内容管理
展开
最新资源
- 多模态联合稀疏表示在视频目标跟踪中的应用
- Kubernetes资源管控与Gardener开源软件实践解析
- MPI集群监控与负载平衡策略
- 自动化PHP安全漏洞检测：静态代码分析与数据流方法
- 青苔数据CEO程永：技术生态与阿里云开放创新
- 制造业转型： HyperX引领企业上云策略
- 赵维五分享：航空工业电子采购上云实战与运维策略
- 单片机控制的LED点阵显示屏设计及其实现
- 驻云科技李俊涛：AI驱动的云上服务新趋势与挑战
- 6LoWPAN物联网边界路由器：设计与实现
- 猩便利工程师仲小玉：Terraform云资源管理最佳实践与团队协作
- 类差分度改进的互信息特征选择提升文本分类性能
- VERITAS与阿里云合作的混合云转型与数据保护方案
- 云制造中的生产线仿真模型设计与虚拟化研究
- 汪洋在PostgresChina2018分享：高可用 PostgreSQL 工具与架构设计
- 2018 PostgresChina大会：阿里云时空引擎Ganos在PostgreSQL中的创新应用与多模型存储
资源上传下载、课程学习等过程中有任何疑问或建议，欢迎提出宝贵意见哦~我们会及时处理！
点击此处反馈
