HDMI Forum Confidential Page 18 of 478
Table of Tables
Table 5-1: Type A with Power Connector Pin Assignment .................................................................................................42
Table 5-2: Type D with Power Connector Pin Assignment .................................................................................................42
Table 5-3: Connector Contact Sequence for Type A Connector .........................................................................................43
Table 5-4: Cable Assembly Parameters ..............................................................................................................................49
Table 5-5: Type A, Category 1, 2 vs. Category 3 Connector Pin Assignment Comparison .................................................52
Table 5-6: Type C, Category 1, 2 vs.to Category 3 Connector Pin Assignment Comparison ..............................................53
Table 5-7: Type D, Category 1, 2 vs. Category 3 Connector Pin Assignment Comparison .................................................53
Table 5-8: Electrical Performance ......................................................................................................................................55
Table 6-1: DC Characteristics for 3.4 Gbps < R
bit
≤ 6.0 Gbps at TP1 ...................................................................................61
Table 6-2: AC Characteristics for 3.4 Gbps < R
bit
≤ 6.0 Gbps at TP1 ...................................................................................61
Table 6-3: Source Impedance Characteristics for 3.4 Gbps < R
bit
≤ 6.0 Gbps at TP1 ..........................................................61
Table 6-4: HDMI Source Jitter Characteristics for 3.4 Gbps < R
bit
≤ 6.0 Gbps at TP2_EQ ...................................................62
Table 6-5: Functions defining horizontal and vertical dimensions for the eye diagram at TP2_EQ ..................................63
Table 6-6: Sink Operating DC Input Characteristics for devices supporting 3.4 Gbps < R
bit
≤ 6.0 Gbps at TP2 ..................64
Table 6-7: Sink AC Input Characteristics for 3.4 Gbps < R
bit
≤ 6.0 Gbps at TP2 ..................................................................64
Table 6-8: Sink Impedance Characteristics for 3.4 Gbps < R
bit
≤ 6.0 Gbps at TP2 ..............................................................64
Table 6-9: Summary of scrambling periods ........................................................................................................................66
Table 6-10: First 32 LFSR Values for all Data Channels ......................................................................................................68
Table 6-11: Bit assignments for XOR logic operation for 8-bit data ...................................................................................69
Table 6-12: Bit assignments for XOR logic operation for 4-bit data ...................................................................................69
Table 6-13: 8-bit values that map to the TMDS Video Guard Band Codes ........................................................................69
Table 6-14: 8-bit values that map to the TMDS Data Island Guard Band Codes ................................................................69
Table 6-15: IToggle Bit Generation Variables .....................................................................................................................71
Table 6-16: Bit assignments for XOR logic operation for 4-bit data ...................................................................................72
Table 6-17: 10-bit codes for scrambled control periods ....................................................................................................72
Table 6-18: CEC line Electrical Specifications for all Configurations ..................................................................................84
Table 6-19: FRL Lane link rates ...........................................................................................................................................86
Table 6-20: DC Characteristics for 6 Gbps, 8 Gbps, 10 Gbps, and 12 Gbps at TP1 .............................................................88
Table 6-21: AC Characteristics for 3 Gbps, 6 Gbps, 8 Gbps, 10 Gbps, and 12 Gbps at TP1 ................................................89
Table 6-22: Source Impedance Characteristics for 3 Gbps, 6 Gbps, 8 Gbps, 10 Gbps, and 12 Gbps at TP1 (Informative) 89
Table 6-23: Parameters defining horizontal and vertical dimensions for the 16b18b eye diagram at TP2_EQ ................90
Table 6-24: TP2_EQ Source Jitter Requirement (unit is T
bit
= 1/R
bit
) ..................................................................................90
Table 6-25: Sink operating DC Input Characteristics for Devices supporting 3 Gbps, 6 Gbps, 8 Gbps, 10 Gbps, and 12
Gbps at TP2 ........................................................................................................................................................................91
Table 6-26: Sink AC Input Characteristics for 3 Gbps, 6 Gbps, 8 Gbps, 10 Gbps, and 12 Gbps at TP2 ...............................91
Table 6-27: Sink Impedance Characteristics for 3 Gbps, 6.0 Gbps, 8 Gbps, 10 Gbps, 12 Gbps at TP2 (Informative) .........91
Table 6-28: P2_EQ Sink Jitter Tolerance Requirement (unit is T
bit
= 1/R
bit
)........................................................................92
Table 6-29: Sinusoidal Jitter Frequency and Jitter Amplitude for Sink Jitter Tolerance Test .............................................92
Table 6-30: HF-VSDB registers for Sink Link Training Capability ........................................................................................93
Table 6-31: SCDC registers for Link Training ......................................................................................................................93
Table 6-32: Link Training Patterns in 16b18b mode ..........................................................................................................94
Table 6-33: First 11 LFSR values for 16b18b PRBS .............................................................................................................95
Table 6-34: Link Training States .........................................................................................................................................96
Table 6-35: FRL Map Character – FRL Packet Type ......................................................................................................... 100
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