S32K1XX ADC Driver Guide for AUTOSAR MCAL: Configuring and Compatibility

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本指南是针对AUTOSAR（Automotive Open System Architecture）多核应用适配器（MCAL）中的模拟数字转换器（ADC）进行移植的详细手册，适用于S32K1XX系列微控制器。文档由NXPMCAL团队在2021年7月9日发布，版本号为UM2ADCASR4.0Rev0003R1.0.5，适用于S32K148_LQFP144、S32K148_LQFP176和S32K148_LQFP等NXP半导体公司的特定微控制器型号。主要内容包括： 1. **引言**： - 文档旨在提供S32K1XX系列微控制器上AUTOSAR ADC驱动程序的全面指导，解释了ADC的配置参数和与规格的差异，以及与AUTOSAR标准的关系。 - 提到软件规格文档中详细描述了ADC驱动程序的要求和API接口，以便开发人员理解和实现ADC功能。 2. **支持衍生产品**： - 这个ADC驱动程序专为指定的NXP半导体S32K148系列微控制器设计，特别是LQFP封装的144引脚和176引脚版本。 3. **ADC驱动程序**： - 关注的重点在于适配AUTOSAR标准，这意味着驱动程序的设计遵循AUTOSAR架构，使得硬件与软件之间的交互更加标准化和模块化。 - ADC驱动程序配置参数的调整可能涉及到性能优化、电源管理或其他特定于平台的需求，开发者需要了解这些细节以确保系统的兼容性和效率。 4. **文档更新历史**： - 提供了文档的修订历史，便于跟踪版本更新和任何关键变化，这对于维护和故障排查至关重要。 5. **法律免责声明**： - 所有提供的信息都受法律保护，提醒用户在使用时需遵守相关规定。本指南对于那些希望在S32K1XX系列微控制器上使用AUTOSAR ADC驱动并进行适配的开发人员来说，是一份不可或缺的技术参考资料，它详细阐述了如何将ADC与AUTOSAR架构整合，确保在汽车电子系统中的稳定性和一致性。

NXP Semiconductors

User Manual

for S32K1XX ADC Driver

The PDB is used together with ADC hardware unit for all group conversions (HW

triggered or SW triggered). There is a dedicated sub-container in every group for

configuring the delays associated with each channel:

2.6.5.1 AdcGroupInBacktoBackMode - Enable/Disable the channel conversions occurring

in Back to Back mode.

When this parameter is enabled, the PDB pretriggers will be configured to work in back

to back mode: PDB_CH1n_C1[BB] bits are set for all the group channels, except the first

one.

The first channel conversion complete will trigger the PDB channel's second pretrigger,

and so on until the last channel of the group. This ensures that the channel conversions

occur in sequence, as quickly as possible and without causing internal PDB errors.

The Adc driver can convert only up to N channels at once, where N = number of PDB

Channels X 8 pretriggers each; for groups larger than that, Adc driver will split the group

in sub-groups of N and convert them with sub-group conversions. Interrupt processing

is needed between the sub-groups for register re-configuration. The N channels are

converted using one or more PDB channels (each controlling 8 pretriggers), but the

different channels do not work in back to back mode together, so a delay is needed for

the 2nd, 3rd PDB channels, otherwise PDB errors will occur. Adc driver will configure

this delay value when Back to back mode is used, with the value defined by the user

in AdcDelayNextPdb parameter. The sequences of 8 channels associated to a PDB

channel will happen in back to back mode.

If AdcGroupInBacktoBackMode is not enabled for a group, all pretriggers of

the PDB channels will be triggered at the same time causing internal PDB errors,

unless the coherence of channel conversions is ensured via the delay configured

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for each pretrigger. This is why at least one of AdcGroupInBacktoBackMode and

AdcGroupUsesChannelDelays options needs to be configured for an Adc Group.

If both parameters are configured for the Adc Group, the user can configure a delay only

for the first channel conversion, and the rest will be converted in back to back mode.

If AdcGroupUsesChannelDelays is not configured for the group, the first channel will

have an associated delay of 0, and will convert immediately after the external trigger is

received.

2.6.5.2 AdcGroupUsesChannelDelays - Enable/Disable the usage of channel delays in

PDB pretriggers.

When this parameter is enabled, the PDB pretriggers will have individual delays

configured. PDB_CH1nDLYx will be set with the values configured in AdcChannelDelay

list for each channel. The values must not be equal or too close, otherwise PDB internal

errors will occur.

The Adc driver can convert only up to N channels at once, where N = number of PDB

Channels X 8 pretriggers each; for groups larger than that, Adc driver will split the group

in sub-groups of N and convert them with sub-group conversions. Interrupt processing is

needed between the sub-groups for register re-configuration. The timing of the channel

conversions will be accurate only for the first N channels; for the next ones, the on top of

the configured delay, the delay of previous conversions and interrupt processing will be

implicitly added. For this reason, it's safe co configure a delay of 0 for the N+1 channel.

But the delay values for each group of N need to be increasing, so that the channel

conversions occur in the order they were defined in the group.

If AdcGroupInBacktoBackMode is also configured for the Adc Group, the user can

configure a delay only for the first channel conversion, and the rest will be converted

in back to back mode (see description of AdcGroupInBacktoBackMode). The delay

value defined by the user in AdcDelayNextPdb parameter will be used for 2nd, 3rd PDB

channel to avoid PDB internal errors.

2.6.5.3 AdcDelayNextPdb – configuring the delay between PDB channel conversions

The PDB unit can have one or more PDB Channels of 8 pretriggers each that will be

used together for setting up conversions of large groups. The PDB Channels will be

started together when the PDB unit is triggered, thus risking to request conversions at the

same time and causing internal errors. For this reason, the value of AdcDelayNextPdb is

needed to be added as delay between PDB channels when Back to Back mode is used.

The AdcDelayNextPdb value should be greater than the timing to convert 8 channels.

The maximum total conversion time is determined by the clock source chosen and the

divide ratio selected. The clock source is selectable by CFG1[ADICLK], and the divide

ratio is specified by CFG1[ADIV]. To calculate total conversion time for one channel the

following formula is applied: ADC TOTAL CONVERSION TIME = Sample Phase Time

(set by SMPLTS+1) + Hold Phase (1 ADC Cycle) + Compare Phase Time (8-bit Mode=20

ADC Cycles, 10-bit Mode=24 ADC Cycles, 12-bit Mode=28 ADC Cycles) + Single or First

continuous time adder (5 ADC cycles + 5 bus clock cycles).

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NXP Semiconductors

User Manual

for S32K1XX ADC Driver

2.6.5.4 PDB Unit settings

There is a PDB sub-container for configuring general PDB unit settings.

AdcPdbPrescalerDividerSelect and AdcPdbMultiplicationFactorSelect can be used to

fine tune the frequency at which PDB counter works. These values will be written into

PRESCALER and MULT bitfields of PDB_SC register during initialization. The PDB

counter uses the peripheral clock divided by the product of a factor (selected by MULT

field) and an integer factor (set by PRESCALAR field), or in other words, (peripheral

clock)/(MULT x PRESCALAR). For more details about the implementation of these

bitfields in the hardware please check the Reference Manual.

Setting AdcPdbChannelSequenceErrorEnable enables the PDB sequence error interrupt

- any of the PDB channel sequence error flags will generate a PDB sequence error

interrupt. The sequence error flags can be set as result of various invalid scenarios

involving the PDB, most usual being that one pretrigger becomes asserted and requests

a conversion to ADC unit while another conversion is still ongoing. When one of these

flags is set, the PDB unit will be stuck and not request any conversions until the flags are

cleared. The flags will be cleared by PDB sequence error interrupt (if enabled), and an

optional notification function will be called to signal this event to the user. The notification

function can be configured in AdcPdbErrorNotification field.

2.7 Runtime Errors

The driver generates the following DEM errors at runtime.

Function Error Code Condition triggering the error

N/A N/A N/A

Table 6. Runtime Errors

2.8 Software specification

The following sections contains driver software specifications.

2.8.1 Define Reference

Constants supported by the driver are as per AUTOSAR Adc Driver software

specification Version 4.0 Rev0003 .

2.8.1.1 Define ADC_VENDOR_ID

Name ADC_VENDOR_ID

Initializer 43

Table 7. Define ADC_VENDOR_ID Description

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