1.4.2.2 Initialize RAM
Depending on the application, the next steps may be required. First, copy the vector table
from flash to RAM, copy initialized data from flash to RAM, clear the zero-initialized
data section, and copy functions from flash to RAM.
1.4.2.3 Enable port clocks
To configure the I/O pin muxing options, the port clocks must first be enabled. This
allows the pin functions to later be changed to the desired function for the application.
SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK
| SIM_SCGC5_PORTB_MASK
| SIM_SCGC5_PORTC_MASK
| SIM_SCGC5_PORTD_MASK
| SIM_SCGC5_PORTE_MASK );
1.4.2.4 Ramp system clock to selected frequency
The Multipurpose Clock Generator (MCG) provides several options for clocking the
system. Configure the MCG mode, reference source, and selected frequency output based
on the needs of the system.
1.4.2.5 Enable pin interrupt
In this example, pin PTA4 is connected to a push button. An interrupt is generated when
the button is pressed. A GPIO interrupt is used instead of an NMI interrupt because an
edge-sensitive interrupt is preferred versus a level-sensitive interrupt. This ensures that
one interrupt will occur per button press. Interrupts need to be enabled in the ARM core,
as described in the NVIC chapter.
/* Configure the PTA4 pin for its GPIO function */
PORTA_PCR4 = PORT_PCR_MUX(0x1); // GPIO is alt1 function for this pin
/* Configure the PTA4 pin for rising edge interrupts */
PORTA_PCR4 |= PORT_PCR_IRQC(0x9);
/* Initialize the NVIC to enable the specified IRQ */
enable_irq(87);
NOTE
To save space, the enable_irq() function is not shown. See the
interrupts section for details on how to enable the IRQ. Also, to
save space the interrupt service routine is not shown.
Typical system initialization
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
16 Freescale Semiconductor