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首页IEEE 802.3 2012: Energy-Efficient Ethernet (EEE) and LPIC Specifications
IEEE 802.3标准于2012年更新,该标准涵盖了第6节,主要关注能源效率(Energy-Efficient Ethernet,EEE)的规范。EET定义了节能技术在以太网中的应用,旨在降低网络设备的功耗,提升能源利用效率。
在第78条款中,重点是LP(Low-Power IDLE)信号处理。这一子层的目的是在发送端和接收端之间实现低功耗通信状态的协调。LPISignaling部分介绍了不同层面的服务接口,如网络服务到LP客户端接口,以及LP客户端与物理层之间的交互。具体包括:
1. **LP_IDLE.request**:这是一个服务原语,当客户端希望进入低功耗模式时发送,用于请求PHY进入低功耗状态。它有四个关键方面:
- 功能:指示PHY停止发送数据,进入空闲状态。
- 生成时机:通常在数据传输结束后或者根据网络层的指示。
- 收到影响:接收方确认后,PHY将进入低功耗模式。
- 服务原语的语义明确,确保双方理解操作。
2. **LP_IDLE.indication**:当接收端检测到网络空闲且可以进入低功耗状态时,向发送端发送此信号。其功能包括告知客户端网络空闲,以及可能的电源管理操作。
- 生成时机:当PHY检测到无数据传输且满足低功耗条件时。
- 收到影响:接收端的LP_IDLE.indication有助于减少发送端不必要的功耗。
3. **Reconciliation sublayer operation**:这部分关注LP模式下的协议协调,涉及RSLPI(Reconciliation Sublayer Low-Power Interface)功能。这包括:
- RSLPI assert function:确保在LP模式转换期间,协议一致性得以维护。
- LP detect function:检测网络活动以避免误入低功耗状态。
- PHY LPI operation:包括发送和接收操作,如在发送数据包时恢复到全功率工作状态,在接收时切换回低功耗监听。
4. **EEE Supported PHY types**:描述了支持的低功耗PHY类型,这些类型可能是为了实现EET而设计的,具有节能特性,如自动功率调整和休眠功能。
5. **LP mode timing parameters description**:给出了进入和退出LP模式的具体时间参数,这对于设备制造商和网络管理员来说是重要的参考,以优化功耗管理和延迟控制。
6. **Capabilities Negotiation**:这部分可能涉及在设备间协商并确定哪些低功耗功能和参数可以在特定环境下使用,以确保节能效果的同时维持网络性能。
IEEE 802.3 2012第6节提供了关于如何在以太网中实现节能通信的关键细节,包括低功耗信号机制、操作规程和硬件兼容性要求,这对于绿色通信网络的发展和技术选型具有重要意义。
16 Copyright © 2012 IEEE. All rights reserved.
90. Ethernet support for time synchronization protocols.........................................................................323
90.1 Introduction............................................................................................................................... 323
90.2 Overview................................................................................................................................... 323
90.3 Relationship with other IEEE standards ................................................................................... 323
90.4 Time Synchronization Service Interface (TSSI)....................................................................... 323
90.4.1 Introduction....................................................................................................................... 323
90.4.1.1 Interlayer service interfaces .................................................................................... 324
90.4.1.2 Responsibilities of TimeSync Client ...................................................................... 324
90.4.2 TSSI .................................................................................................................................. 325
90.4.3 Detailed service specification ........................................................................................... 325
90.4.3.1 TS_TX.indication primitive.................................................................................... 325
90.4.3.1.1 Semantics ...................................................................................................... 325
90.4.3.1.2 Condition for generation ............................................................................... 325
90.4.3.1.3 Effect of receipt ............................................................................................ 325
90.4.3.2 TS_RX.indication primitive.................................................................................... 325
90.4.3.2.1 Semantics ...................................................................................................... 325
90.4.3.2.2 Condition for generation ............................................................................... 326
90.4.3.2.3 Effect of receipt ............................................................................................ 326
90.5 generic Reconciliation Sublayer (gRS)..................................................................................... 326
90.5.1 TS_SFD_Detect_TX function .......................................................................................... 326
90.5.2 TS_SFD_Detect_RX function .......................................................................................... 326
90.6 Overview of management features ........................................................................................... 327
90.7 Data delay measurement........................................................................................................... 328
90.8 Protocol implementation conformance statement (PICS) proforma for Clause 90, Ethernet
support for time synchronization protocols .............................................................................. 330
90.8.1 Introduction....................................................................................................................... 330
90.8.2 Identification..................................................................................................................... 330
90.8.2.1 Implementation identification................................................................................ 330
90.8.2.2 Protocol summary .................................................................................................. 330
90.8.3 TSSI indication ................................................................................................................. 331
90.8.4 Data delay reporting.......................................................................................................... 331
Annex 83A (normative) 40 Gb/s Attachment Unit Interface (XLAUI) and 100 Gb/s Attachment Unit
Interface (CAUI)...............................................................................................................
.............. 333
83A.1 Overview.................................................................................................................................. 333
83A.1.1 Summary of major concepts ........................................................................................... 334
83A.1.2 Rate of operation............................................................................................................. 334
83A.2 XLAUI/CAUI link block diagram ........................................................................................... 334
83A.2.1 Transmitter compliance points........................................................................................ 335
83A.2.2 Receiver compliance points ............................................................................................ 336
83A.3 XLAUI/CAUI electrical characteristics................................................................................... 336
83A.3.1 Signal levels .................................................................................................................... 336
83A.3.2 Signal paths..................................................................................................................... 337
83A.3.3 Transmitter characteristics ..............................................................................................337
83A.3.3.1 Output amplitude .................................................................................................. 337
83A.3.3.2 Rise/fall time.........................................................................................................338
83A.3.3.3 Differential output return loss............................................................................... 339
83A.3.3.4 Common-mode output return loss ........................................................................ 339
83A.3.3.5 Transmitter eye mask and transmitter jitter definition.......................................... 340
83A.3.4 Receiver characteristics .................................................................................................. 341
83A.3.4.1 Bit error ratio ........................................................................................................342
83A.3.4.2 Input signal definition ........................................................................................... 342
Copyright © 2012 IEEE. All rights reserved. 17
83A.3.4.3 Differential input return loss................................................................................. 342
83A.3.4.4 Differential to common-mode input return loss ................................................... 343
83A.3.4.5 AC coupling .......................................................................................................... 344
83A.3.4.6 Jitter tolerance.......................................................................................................344
83A.4 Interconnect characteristics...................................................................................................... 345
83A.4.1 Characteristic impedance ................................................................................................ 346
83A.5 Electrical parameter measurement methods ............................................................................ 347
83A.5.1 Transmit jitter ................................................................................................................. 347
83A.5.2 Receiver tolerance........................................................................................................... 347
83A.6 Environmental specifications................................................................................................... 348
83A.6.1 General safety ................................................................................................................. 348
83A.6.2 Network safety ................................................................................................................ 348
83A.6.3 Installation and maintenance guidelines ......................................................................... 348
83A.6.4 Electromagnetic compatibility ........................................................................................ 348
83A.6.5 Temperature and humidity.............................................................................................. 348
83A.7 Protocol implementation conformance statement (PICS) proforma for Annex 83A, 40 Gb/s
Attachment Unit Interface (XLAUI) and 100 Gb/s Attachment Unit Interface (CAUI)......... 349
83A.7.1 Introduction..................................................................................................................... 349
83A.7.2 Identification ................................................................................................................... 349
83A.7.2.1 Implementation identification............................................................................... 349
83A.7.2.2 Protocol summary ................................................................................................. 349
83A.7.3 Major capabilities/options...............................................................................................350
83A.7.4 XLAUI/CAUI transmitter requirements ......................................................................... 350
83A.7.5 XLAUI/CAUI receiver requirements ............................................................................. 351
83A.7.6 Electrical measurement methods .................................................................................... 351
83A.7.7 Environmental specifications.......................................................................................... 351
Annex 83B (normative) Chip-module 40 Gb/s Attachment Unit Interface (XLAUI) and 100 Gb/s
Attachment Unit Interface (CAUI) ................................................................................................. 353
83B.1 Overview .................................................................................................................................. 353
83B.2 Compliance point specifications for chip-module XLAUI/CAUI ........................................... 355
83B.2.1 Module specifications ..................................................................................................... 357
83B.2.2 Host specifications.......................................................................................................... 360
83B.2.3 Host input signal tolerance ............................................................................................. 361
83B.3 Environmental specifications ................................................................................................... 362
83B.3.1 General safety ................................................................................................................. 362
83B.3.2 Network safety................................................................................................................ 362
83B.3.3 Installation and maintenance guidelines......................................................................... 362
83B.3.4 Electromagnetic compatibility........................................................................................ 362
83B.3.5 Temperature and humidity.............................................................................................. 363
83B.4 Protocol implementation conformance statement (PICS) proforma for Annex 83B, Chip-
module 40 Gb/s Attachment Unit Interface (XLAUI) and 100 Gb/s Attachment Unit
Interface (CAUI) ...................................................................................................................... 364
83B.4.1 Introduction..................................................................................................................... 364
83B.4.2 Identification................................................................................................................... 364
83B.4.2.1 Implementation identification............................................................................... 364
83B.4.2.2 Protocol summary ................................................................................................. 364
83B.4.3 Major capabilities/options...............................................................................................365
83B.4.4 Module requirements ......................................................................................................365
83B.4.5 Host requirements........................................................................................................... 365
83B.4.6 Environmental specifications.......................................................................................... 366
Annex 83C (normative) PMA sublayer partitioning examples .................................................................. 367
18 Copyright © 2012 IEEE. All rights reserved.
83C.1 Partitioning examples with FEC .............................................................................................. 367
83C.1.1 FEC implemented with PCS........................................................................................... 367
83C.1.2 FEC implemented with PMD ......................................................................................... 368
83C.2 Partitioning examples without FEC ......................................................................................... 368
83C.2.1 Single PMA sublayer without FEC ................................................................................ 368
83C.2.2 Single XLAUI/CAUI without FEC ................................................................................ 369
83C.2.3 Separate SERDES for optical module interface ............................................................. 369
Annex 85A (informative) 40GBASE-CR4 and 100GBASE-CR10 TP0 and TP5 test point parameters... 371
85A.1 Overview.................................................................................................................................. 371
85A.2 Transmitter characteristics at TP0............................................................................................ 371
85A.3 Receiver characteristics at TP5 ................................................................................................ 372
85A.4 Transmitter and receiver differential printed circuit board trace loss...................................... 372
85A.5 Channel insertion loss .............................................................................................................. 373
85A.6 Channel return loss................................................................................................................... 374
85A.7 Channel insertion loss deviation (ILD).................................................................................... 374
85A.8 Channel integrated crosstalk noise (ICN) ................................................................................ 375
Annex 86A (normative) Parallel Physical Interface (nPPI) for 40GBASE-SR4 and 40GBASE-LR4
(XLPPI) and 100GBASE-SR10 (CPPI) ......................................................................................... 377
86A.1 Overview.................................................................................................................................. 377
86A.2 Block diagram and test points.................................................................................................. 377
86A.3 Lane assignments ..................................................................................................................... 377
86A.4 Electrical specifications for nPPI............................................................................................. 378
86A.4.1 nPPI host to module electrical specifications ................................................................. 378
86A.4.1.1 Differential return losses at TP1 and TP1a........................................................... 379
86A.4.2 nPPI module to host electrical specifications ................................................................. 379
86A.4.2.1 Differential return losses at TP4 and TP4a........................................................... 380
86A.5 Definitions of electrical parameters and measurement methods ............................................. 381
86A.5.1 Test points and compliance boards................................................................................. 381
86A.5.1.1 Compliance board parameters .............................................................................. 382
86A.5.1.1.1 Reference insertion losses of HCB and MCB .............................................. 383
86A.5.1.1.2 Electrical specifications of mated HCB and MCB ....................................... 384
86A.5.2 Test patterns and related subclauses ............................................................................... 386
86A.5.3 Parameter definitions ...................................................................................................... 386
86A.5.3.1 AC common-mode voltage ................................................................................... 387
86A.5.3.2 Termination mismatch .......................................................................................... 387
86A.5.3.3 Transition time ...................................................................................................... 388
86A.5.3.4 Data Dependent Pulse Width Shrinkage (DDPWS) ............................................. 388
86A.5.3.5 Signal to noise ratio Qsq....................................................................................... 389
86A.5.3.6 Eye mask for TP1a and TP4 ................................................................................. 389
86A.5.3.7 Reference impedances for electrical measurements ............................................. 390
86A.5.3.8 Host input signal tolerance ................................................................................... 390
86A.5.3.8.1 Introduction................................................................................................... 390
86A.5.3.8.2 Test equipment and setup ............................................................................. 390
86A.5.3.8.3 Stressed eye jitter characteristics .................................................................. 390
86A.5.3.8.4 Calibration .................................................................................................... 392
86A.5.3.8.5 Calibration procedure ................................................................................... 392
86A.5.3.8.6 Test procedure............................................................................................... 393
86A.6 Recommended electrical channel.............................................................................................394
86A.7 Safety, installation, environment, and labeling........................................................................ 395
86A.7.1 General safety ................................................................................................................. 395
Copyright © 2012 IEEE. All rights reserved. 19
86A.7.2 Installation ...................................................................................................................... 395
86A.7.3 Environment.................................................................................................................... 395
86A.7.4 PMD labeling .................................................................................................................. 395
86A.8 Protocol implementation conformance statement (PICS) proforma for Annex 86A, Parallel
Physical Interface (nPPI) for 40GBASE-SR4 and 40GBASE-LR4 (XLPPI) and
100GBASE-SR10 (CPPI) ........................................................................................................ 396
86A.8.1 Introduction..................................................................................................................... 396
86A.8.2 Identification ................................................................................................................... 396
86A.8.2.1 Implementation identification............................................................................... 396
86A.8.2.2 Protocol summary ................................................................................................. 396
86A.8.3 Major capabilities/options...............................................................................................397
86A.8.4 PICS proforma tables for Parallel Physical Interface (nPPI) for 40GBASE-SR4 and
40GBASE-LR4 (XLPPI) and 100GBASE-SR10 (CPPI)............................................... 397
86A.8.4.1 PMD functional specifications.............................................................................. 397
86A.8.4.2 Electrical specifications for nPPI.......................................................................... 398
86A.8.4.3 Definitions of parameters and measurement methods.......................................... 398
86A.8.4.4 Environmental and safety specifications .............................................................. 399
20 Copyright © 2012 IEEE. All rights reserved.
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