TI-BQ2022A：1K位OTP EPROM with SDQ接口与特性

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TI-BQ2022A是一款高度集成的单片机，具备独特的功能和设计，适用于多种应用领域。其核心特点包括： 1. **1K位一次性编程（OTP）EPROM**: BQ2022A内置1024位的OTP EPROM，允许用户存储定制的配置数据，这在安全编码、库存追踪和产品修订维护等方面具有重要意义。它提供了足够的空间来存储关键设置和固件，确保了系统的个性化和灵活性。 2. **独特的64位ID ROM**: 每个BQ2022A芯片出厂时都预设有一个独一无二的64位ID编号，这对于产品身份验证、跟踪和管理非常有用，有助于防止假冒和非法复制。 3. **单线接口设计**: 通过简化电路板布局，单线接口减少了布线复杂度，提高了设计效率和成本效益。 4. **同步通信与8位CRC生成电路**: 支持同步通信，减少了主机的中断开销，提高了数据传输的可靠性和效率，特别适合实时和低功耗应用。 5. **SDQ接口兼容性**: 配备SDQ通信控制器，支持标准接口，便于与其他SDQ设备连接，扩展了其在各种电子设备中的应用可能性。 6. **内置内部RAM缓冲区**: 提供8字节的RAM缓冲，能够临时存储数据，增强数据处理能力和性能。 7. **ESD保护**: 数据引脚达到了15kV IEC 61000-4-2静电放电标准，增强了抗电磁干扰能力，确保在恶劣环境下仍能稳定工作。 8. **无需备用电源**: 设计上不需要额外的备用电源，节省了能源消耗，特别适用于电池供电或低功耗系统。 9. **封装选项**: 提供3-pin SOT-23和TO-92两种封装形式，适应不同尺寸和性能要求的电路板设计。最后，需要注意的是，该文档末尾的重要通知包含了关于可用性、保修政策、安全关键应用使用限制、知识产权声明以及其它免责声明等信息，使用前务必仔细阅读。这是生产数据，意味着可能已经过多次修订以反映最新的技术规格和注意事项。

bq2022A

ID ROM

(64 bits)

EPROM

MEMORY

(1024 bits)

EPROM

STATUS

(64 bits)

SDQ Communications

Controller and 8-Bit CRC

Generation Circuit

Internal

Bus

RAM

Buffer

(8 bytes)

SDQ 1

2VSS 3 VSS

bq2022A

www.ti.com

SLUS724E –SEPTEMBER 2006–REVISED MARCH 2016

Product Folder Links: bq2022A

7 Detailed Description

7.1 Overview

The Functional Block Diagram shows the relationships among the major control and memory sections of the

bq2022A. The bq2022A has three main data components: a 64-bit factory-programmed ROM, including 8-bit

family code, 48-bit identification number and 8-bit CRC value, 1024-bit EPROM, and EPROM STATUS bytes.

Power for read and write operations is derived from the DATA pin. An internal capacitor stores energy while the

signal line is high and releases energy during the low times of the DATA pin, until the pin returns high to

replenish the charge on the capacitor. A special manufacturer's PROGRAM PROFILE BYTE can be read to

determine the programming profile required to program the part.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 1024-Bit EPROM

Table 1 is a memory map of the 1024-bit EPROM section of the bq2022A, configured as four pages of 32 bytes

each. The 8-byte RAM buffers are additional registers used when programming the memory. Data are first

written to the RAM buffer and then verified by reading an 8-bit CRC from the bq2022A that confirms proper

receipt of the data. If the buffer contents are correct, a programming command is issued and an 8-byte segment

of data is written into the selected address in memory. This process ensures data integrity when programming

the memory. The details for reading and programming the 1024-bit EPROM portion of the bq2022A are in the

Memory/Status Function Commands section of this data sheet.

Table 1. 1024-Bit EPROM Data Memory Map

ADDRESS(HEX) PAGE

0060-007F Page 3

0040-005F Page 2

0020-003F Page 1

0000-001F Page 0

bq2022A

SLUS724E –SEPTEMBER 2006–REVISED MARCH 2016

www.ti.com

Product Folder Links: bq2022A

7.3.2 EPROM Status Memory

In addition to the programmable 1024-bits of memory are 64 bits of status information contained in the EPROM

STATUS memory. The STATUS memory is accessible with separate commands. The STATUS bits are EPROM

and are read or programmed to indicate various conditions to the software interrogating the bq2022A. The first

byte of the STATUS memory contains the write protect page bits, that inhibit programming of the corresponding

page in the 1024-bit main memory area if the appropriate write-protection bit is programmed. Once a bit has

been programmed in the write protect page byte, the entire 32-byte page that corresponds to that bit can no

longer be altered but may still be read. The write protect bits may be cleared by using the WRITE STATUS

command.

The next four bytes of the EPROM STATUS memory contain the page address redirection bytes. Bits in the

EPROM status bytes can indicate to the host what page is substituted for the page by the appropriate redirection

byte. The hardware of the bq2022A makes no decisions based on the contents of the page address redirection

bytes. This feature allows the user's software to make a data patch to the EPROM by indicating that a particular

page or pages should be replaced with those indicated in the page address redirection bytes. The ones

complement of the new page address is written into the page address redirection byte that corresponds to the

original (replaced) page. If a page address redirection byte has an FFh value, the data in the main memory that

corresponds to that page are valid. If a page address redirection byte has some other hex value, the data in the

page corresponding to that redirection byte are invalid, and the valid data can now be found at the ones

complement of the page address indicated by the hexadecimal value stored in the associated page address

redirection byte. A value of FDh in the redirection byte for page 1, for example, indicates that the updated data

are now in page 2. The details for reading and programming the EPROM status memory portion of the bq2022A

are given in the Memory/Status Function Commands section.

Table 2. EPROM Status Bytes

ADDRESS (HEX) PAGE

00h

Write protection bits

BIT0—write protect page 0

BIT1—write protect page 1

BIT2—write protect page 2

BIT3—write protect page 3

BIT4 to 7—bitmap of used pages

01h Redirection byte for page 0

02h Redirection byte for page 1

03h Redirection byte for page 2

04h Redirection byte for page 3

05h Reserved

06h Reserved

07h Factory programmed 00h

7.3.3 Error Checking

To validate the data transmitted from the bq2022A, the host generates a CRC value from the data as they are

received. This generated value is compared to the CRC value transmitted by the bq2022A. If the two CRC

values match, the transmission is error-free. The equivalent polynomial function of this CRC is X

+ X

+ 1.

Details are found in the CRC Generation section of this data sheet.

7.3.4 Customizing the bq2022A

The 64-bit ID identifies each bq2022A. The 48-bit serial number is unique and programmed by Texas

Instruments. The default 8-bit family code is 09h; however, a different value can be reserved on an individual

customer basis. Contact your Texas Instruments sales representative for more information.

7.3.5 Bus Termination

Because the drive output of the bq2022A is an open-drain, N-channel MOSFET, the host must provide a source

current or a 5-kΩ external pullup, as shown in the typical application circuit in Figure 18.

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