固态硬盘异常断电恢复技术：确保快速启动

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"这篇PDF论文提出了一种针对固态硬盘（SSD）的高效突发断电恢复设计，旨在保证在异常断电后的启动时间和恢复时间。研究由Macronix International Co., Ltd.新兴系统实验室的多个研究人员合作完成，并与台湾科学院信息科学研究所合作。文章探讨了如何通过改进SSD的地址映射策略来提高其性能和可靠性，同时关注在异常断电后的快速恢复优化问题。" 异常掉电恢复是SSD技术中的一个重要问题，因为传统的扫描和恢复过程可能无法应对现代大容量SSD的需求。随着SSD容量的快速增长，现有的恢复机制可能会变得过于耗时且不可接受。FTL（Flash Translation Layer）作为SSD的关键组成部分，负责管理闪存单元的逻辑地址到物理地址的映射，对于数据完整性至关重要。当系统突然断电时，未完成的写操作可能导致数据丢失或损坏，因此需要有效的恢复策略来确保数据的一致性和系统的正常启动。论文中提到的"高效突发断电恢复设计"可能包括以下几点关键内容： 1. 保证启动时间：设计目标是确保SSD在异常断电后能在预设时间内恢复并启动。这可能涉及到优化FTL的恢复算法，以快速重建映射表和验证数据一致性。 2. 快速恢复过程：可能涉及开发一种快速扫描机制，能够在短时间内定位和修复由于断电导致的不完整事务。这可能需要在FTL中集成智能预测和错误检测算法。 3. 数据保护：为了防止数据丢失，设计可能包含了冗余备份策略，如ECC（Error Correction Code）和预留空间，用于存储临时数据或进行错误校验。 4. 低延迟处理：为了保持SSD的高性能，恢复过程需要尽可能地减少延迟。这可能涉及到并发处理和优化I/O调度，以便在恢复期间不影响整体系统性能。 5. 资源管理：有效利用SSD内部资源，如DRAM缓存和NAND闪存通道，以加速恢复过程。 6. 可扩展性：设计应具备良好的可扩展性，能够适应未来更大容量的SSD，确保恢复效率不会因容量增加而降低。这篇论文的重点在于结合FTL技术和异常掉电情况，设计出一种兼顾性能和可靠性的SSD恢复策略。这种策略将有助于提升SSD在面对电源故障时的鲁棒性，保证系统的稳定运行，并缩短用户等待恢复的时间。

An Efﬁcient Sudden-Power-off-Recovery Design with Guaranteed

Booting Time for Solid State Drives

Yu-Ming Chang

1,3

, Ping-Hsien Lin

1,4

, Ye-Jyun Lin

1,5

, Tai-Chun Kuo

1,6

Yuan-Hao Chang

2,10

, Yung-Chun Li

1,7

, Hsiang-Pang Li

1,8

,KCWang

1,9

Macronix International Co., Ltd., Emerging System Lab., Hsinchu 300, Taiwan, R.O.C.

Institute of Information Science, Academia Sinica Taipei 115, Taiwan, R.O.C.

{

sanchang,

pinghsienlin,

yejyunlin,

tjkuo,

monixslee,

sbli,

kcwang}@mxic.com.tw,

johnson@iis.sinica.edu.tw

Abstract

Solid state drives (SSDs) that deliver high-bandwidth and low-latency

performance have become the mainstream of storage devices in modern

systems. Over the past years, there has been a great deal of researches

conducted to improve the SSD performance or reliability with parallel or

efﬁcient address translation designs. On the contrary, little work is done

for the optimization to guarantee the booting/recovery time of SSDs after

any sudden power-off. Motivated by the fact that the fast-growing SSD

capacity gradually makes existing scanning and recovering processes be-

come infeasible and unacceptable, we propose an efﬁcient sudden-power-

off-recovery design to recover an SSD with guaranteed booting time.

The proposed design was implemented on an SSD prototyping platform

equipped with in-house NAND ﬂash memories and was evaluated with

various benchmarks. The results demonstrate that after sudden power-

off, the prototyped SSD can be recovered with a guaranteed and bounded

booting time between 80ms and 200ms.

1. Introduction

Sold state drives (SSDs) that include multiple ﬂash-memory chips have

become a popular alternative to replace hard disk drives (HDDs) in recent

years, because of their shock resistance, high energy efﬁciency, and high

I/O performance. In order to be compatible with the existing storage in-

terface, i.e., logical block address (LBA), each SSD needs to keep track

of the address translation information from LBAs to their corresponding

physical addresses in the ﬂash memory. The address translation infor-

mation is usually maintained/cached in the internal RAM space of the

SSD. Once a sudden power-off (or power-loss) occurs, the address trans-

lation information would be crashed and need to be recovered by scanning

the whole ﬂash-memory space. Such a scanning and recovering process

is extremely time-consuming, and is gradually becoming infeasible and

unacceptable due to the fast-growing storage capacity. Such an observa-

tion motivates us to explore the solution that could efﬁciently recover the

address translation information to make SSDs resilient to sudden power

losses and system crashes.

An SSD usually consists of multiple ﬂash-memory chips. Each chip

is composed of a large number of blocks. Each block consists of a ﬁxed

number of pages, where a block is the basic unit of erase operations and

a page is the unit of read/write operations. Each page is divided into

a data area and a spare area. The data area is used to store user data,

and the spare area is also called out-of-band (OOB) area that maintains

the house-keeping information such as the error correction codes (ECC)

and information of logical block addresses. Because of the write-once

property, each page can not be overwritten unless its residing block is

erased. A typical solution to overcome this constraint is to adopt the

out-place update that writes updated data in free pages to improve the

write performance. As a result, multiple versions of the same data could

coexist in the SSD at the same time. The up-to-date version is called

valid data and the old versions are considered as invalid data. The pages

with valid data (resp. invalid data) are referred to as valid pages (resp.

invalid pages). Due to the out-place update, in each SSD, a management

software, i.e., ﬂash translation layer (FTL), is needed to maintain the

address translation information that maps each LBA to its corresponding

valid page/data. Note that we refer “address translation information” and

“mapping information” interchangeably when there is no ambiguity. In

addition, the FTL also includes a garbage collector that is activated to

reclaim space of invalid data when there is not enough free space in the

SSD. Due to the limited number of program/erase (P/E) cycles of each

block, the FTL also includes a wear leveler that is used to prolong the

lifetime of the SSD by evenly erasing ﬂash blocks to avoid wearing out

any block prematurely.

Due to the importance of address translation information in SSDs,

many excellent FTL designs were proposed to resolve the management

issue and to achieve a good compromise between read/write performance

and RAM space requirement [7,10,13,16]. Based on the on-demand load-

ing/storing address translation information, some proposed to include a

update mapping table that only logs the modiﬁed mapping information

to reduce the overheads on loading/storing address translation informa-

tion [14]. Another research direction is the garbage collection (GC) that

also has signiﬁcant impact on the performance of SSDs. The simplest so-

lution is the greedy policy that selects the block with the largest number of

invalid pages to minimize the overheads on moving valid pages out of the

to-be-erased blocks [17], and some others proposed hot-cold swapping

and data clustering to improve the GC performance with considering the

age of valid data [6,9,11,12]. Meanwhile, to resolve the endurance issue,

some researchers focused on different wear leveling designs to extend

the lifetime of ﬂash storage devices by moving data around ﬂash blocks

to prevent wearing out any block excessively [1, 2, 5, 15]. Furthermore,

due to the advances of manufacturing technology, the reliability of ﬂash

memory has drawn a lot of attention in recent years. To tackle this issue,

some researchers proposed to improve the reliability of ﬂash memory by

reducing the write disturbance [4] or including some parity information

to improve the capability on correcting error data [3, 19]. However, there

is little work that focuses on how to efﬁciently and reliably recover the

address translation information of SSDs after sudden power loses, even

though the fast-growing capacity of SSDs gradually makes greedy scan-

ning methods infeasible.

In this work, an efﬁcient sudden-power-off recovery (SPOR) design is

proposed to enhance the reliability of SSDs with the guaranteed booting

time without additional hardware support. The proposed design aims at

recovering address translation information correctly and efﬁciently after

any (normal or sudden) power-off. In particular, the design is conﬁgurable

such that the booting (recovery) time can be bounded and guaranteed by

adjusting the synchronization frequency of address translation informa-

tion from RAM to ﬂash memory during the runtime. We must point out

that the proposed design only has to read relatively a small number of

pages during the system recovery, in contrast to the past recovery de-

sign by scanning the whole ﬂash-memory space. The evaluation results

demonstrate that the average booting time is 132ms under all investigated

benchmarks. Especially, the booting time is bounded between the theo-

retical worst-case and the best-case values derived from our analysis.

The rest of the paper is organized as follows. Section 2 presents the

proposed sudden-power-off-recovery (SPOR) design. Section 3 reports

the experiment results. Section 4 is the conclusion.

2. A Sudden Power-off Recovery Design

2.1 Overview

In this section, a sudden power-off recovery (SPOR) design is proposed

to enhance the reliability of an SSD by enabling the SSD to survive un-

der any sudden power-off without any power-off notiﬁcation to the con-

troller of the SSD. To be more speciﬁc, the SPOR design can efﬁciently

recover the address translation information after sudden power losses.

Meanwhile, it is realized with a software implementation so that no ad-

ditional hardware resource, e.g., super capacitor, is required. To preserve

the ﬂexibility, this design is conﬁgurable and able to control the expected

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