索尼IMX135 CMOS传感器：高速低噪图像技术

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"IMX135-0AQH5-S 是一款由索尼推出的1300万像素的CMOS图像传感器，适用于彩色相机。这款传感器采用Exmor-RS™技术，具有高速图像捕捉能力，低噪声和高灵敏度的特点，特别适合于需要高画质和低功耗的应用。" IMX135-0AQH5-S传感器是索尼公司设计的一款高性能CMOS（互补金属氧化物半导体）图像传感器，其尺寸为5.867毫米，相当于1/3.06英寸类型，能够提供1300万像素的分辨率。这款传感器采用了独特的堆叠式结构，使得像素布局为正方形，优化了色彩相机的性能。 Exmor-RS™技术是索尼的一项创新，它通过列并行A/D转换器电路实现了高速图像捕获，显著提高了数据处理速度。同时，由于采用了背照式（Backside Illumination, BSI）像素结构，IMX135传感器在相同光照条件下能获得比传统CMOS图像传感器更高的灵敏度和更低的噪声。BSI技术将像素层与电路层分离，允许光线更直接地照射到光电二极管，从而提高光收集效率。此外，该传感器还配备了R、G、B三原色滤镜，用于实现色彩还原，确保了高质量的彩色图像。它具有高灵敏度、低暗电流和无涂抹特性，这意味着即使在低光照环境下也能保持清晰的图像质量。传感器内置电子快门，可以调整积分时间，适应不同场景的拍摄需求。电源管理方面，IMX135-0AQH5-S工作需要三个电压：模拟电源2.7V，数字电源1.05V以及1.8V的输入/输出接口电源。这种电源设计有助于降低整体功耗，使其在性能和节能之间找到了良好的平衡，尤其对比传统的CCD（电荷耦合器件）传感器，其功耗更低。值得注意的是，尽管这款传感器最初是针对手机市场设计的，但索尼并不保证将其用于其他应用时的产品质量和可靠性。因此，如果考虑在非手机应用中使用IMX135，需谨慎评估并确保满足所需的技术和性能标准。 IMX135-0AQH5-S是一款集高速、高灵敏度、低噪声和低功耗于一体的先进图像传感器，广泛应用于需要高质量图像捕捉的领域，如手机摄像头、监控设备、无人机摄影、医疗成像等。其背照式像素结构和Exmor-RS™技术是其主要的技术亮点，使得该传感器在同类产品中脱颖而出。

IMX135-0AQH5-S

Specification of communication bus state

Idle state

Idle state is specified as follows; neither master nor slave device does not drive the SDA and SCL, and these bus

lines are pulled up to Vdd via resister.

Issue “Start condition”

While idle state of 2-wire communication bus, master device (ex. subsequent Image processing LSI, etc.) issues

the communication-start; “start condition; S” by driving SDA from “high” to “low” level. Serial data are transmitted in

8-bit-unit MSB first format. Every 8-bit data transmittion, slave device issues acknowledge or negative

acknowledge (explained later) :A (Acknowlege) / Ᾱ (NegativeAcknowlege).

Data (SDA) are tranmitted in time with SCL cycle. SDA shall toggle while SCL is “low” and hold the value while

SCL is “high”.

The data changes

while the clock is low

Data Sampling

MSB LSB

Start Condition

ACK

SDA

SCL

Bus free State

A5 A4

A1 R/W

Figure 8 Start Condition

Issue “Stop condition”

After A (Acknowlege) / Ᾱ (NegativeAcknowlege) and while SCL is “high”, master device issues communication-

stop; “stop conditon; P” by driving SDA from “low” to “high” level. After issuing “stop”, master release 2-wire serial

bus to idle state.

Stop Condition

SDA

SCL

Bus free state

D5 D4 D3 D2 D1 D0 R/W

ACK

NACK

Figure 9 Stop Condition

IMX135-0AQH5-S

Read/Write operation of 2-wire serial communication

IMX135-0AQH5-S has an index function that indicates which address to be accessed. When reading/writing the

value from/to an asked address, the Master must set the address value to the index. Index value is designated by

2-byte of dummy write operation after the slave address transmission. The index value is automatically

incremented “one” by the “Acknowledge/Negative Acknowledge” for data transfer.

IMX135-0AQH5-S supports for of read modes and two of write modes being compliant to SMIA 1.0 Part2

Specification; Cemera Control Interface (CCI).

Table 6 Operations Supported by 2-wire Serial Communication

Access mode

CCI Single read from random location

(Single read from an arbitrary address)

CCI Single read from current location

(Single read from the held address)

CCI sequential read starting from random location

(Sequential read starting from an arbitrary address)

CCI sequential read starting from current location

(Sequential read starting from the held address)

CCI single write to random location

(Single write to an arbitrary address)

CCI sequential write starting from random location

(Sequential write starting from an arbitrary address)

CCI single read from random location

The upper level of the figure below shows the sensor internal index value, and the lower level shows the SDA I/O

data flow. The master sets the sensor index value to M by designating the sensor slave address with a write

request,and then designating the address (M). After that the Master generates the Start condition. The Start

condition is generated without generating the Stop condition, so it becomes the Repeated Start condition. Next,

when the Master sends the slave address with a read request, the sensor outputs an Acknowledge followed

immediately by the index address data on SDA. After the Master receives the data, it generates a Negative

Acknowledge and the Stop condition to end the communication.

When reading single datum from asked address register, the master device starts write-operation with the slave

address of IMX135-0AQH5-S and by making 2-bytes of dummy write master sets the address value (M) to the

index. After that master issue the “start condition” again instead of issuing “stop condition”. This “start condition” is

recognized as “repeated start condition”. Then transmitting the read request with the slave address,

IMX135-0AQH5-S issues the “Acknowledge” and start transmitting the register value from indexed address (M).

Master issues the “Negative Acknowledge” and “stop condition” after receiving the transmission.

The figure below indicates the transition of index value and data on SDA line.

From Master to Slave

From Slave to Master

0 AS A A A P1 A

Previous Index value Index M

S = Start Condition

Sr = Repeated Start Condition

P = Stop Condition

A = Acknowledge

A = Negative Acknowledge

Index

M + 1

Slave Address

[7:1]

[15:8]

[7:0]

Slave Address

[7:1]

Data

[7:0]

Index, value M

Figure 12 CCI single read from random location

IMX135-0AQH5-S

CCI single read from current location

When master transmits slave address, and does not designate index, index value is held. And the inde value is

incremented at the “Acknowledge/NegativeAcknowledge” after reading/writeing the register value. When master

knows the current index value is set to the asked address, master transmits the slave address and read request,

then the value from the register transmitted right after the “Acknowledge” issued by IMX135-0AQH5-S. Master

issues the “Negative Acknowledge” and “Stop” and terminate the communication. Since the index value is

incremented one by this “Negative Acknowledge”, master can read the register value of next address with the

same procedure.

From Master to Slave

From Slave to Master

1 AS A P 1 A

A P

S = Start Condition

P = Stop Condition

A = Acknowledge

A = Negative Acknowledge

Previous Index value, K Index K + 1

Index

K + 2

Slave Address

[7:1]

Data

[7:0]

Slave Address

[7:1]

Data

[7:0]

Figure 13 CCI single read from current location

CCI sequential read starting from random location

When reading the data from arbitrary address sequencially, master read the first data by the similar procedure to

“CCI single read from random location” but issues the “Acknowlede” instead of “Negative Acknowledge”, the index

is incremented one by theis “Acknowledge” then master can repeat the read operation. This operation is

terminated when master issues the “Negative Acknowledge”, “Stop condition”, the communication is terminated.

Figure 14 CCI sequential read starting from current location

CCI sequential read starting from current location

When master knows the current index value is set to the asked address, master transmits the slave address and

read request, then the value from the register transmitted right after the “Acknowledge” issued by

IMX135-0AQH5-S. Master issues the “Acknowledge” after receiving 1-byte of the data and IMX135-0AQH5-S

continuously transmits the data from the next address of register since the index value is incremented one by this

“Acknowledge”. By repeating to issue the “Acknowledge” for every 1-byte reading, master can read the data

sequentially. After reading necessary bytes of data, master issues “Negative Acknowledge” and “stop condition”

and then terminates the communication.

Figure 15. CCI sequential read starting from current location

From Master to Slave

From Slave to Master

0 AS A A P1 A

Index M

A A AA

L bytes of data

S = Start Condition

Sr = Repeated Start Condition

P = Stop Condition

A = Acknowledge

A = Negative Acknowledge

Previous Index value, K Index M + 1

Index

(M + L – 1)

Index

(M + L)

Index, value M

Slave

Address

[7:1]

Address

[15:8]

Address

[7:0]

Slave

Address

[7:1]

Data

[7:0]

Data

[7:0]

Data

[7:0]

From Master to Slave

From Slave to Master

P1 AS

Index K

A A AA

L bytes of data

Slave

Address

[7:1]

Data

[7:0]

Data

[7:0]

Data

[7:0]

S = Start Condition

P = Stop Condition

A = Acknowledge

A = Negative Acknowledge

Index K + 1

Index

(K + L – 1)

Index

(K + L)

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