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Figure & Table Contents
Figure 4-1. The schematic of Samsung eMMC ...................................................................................... 9
Figure 4-2. SMT & connection method of pull-up resistors. ................................................................ 10
Figure 4-3. The Schematic of Samsung eMMC using 4-bit bus mode ................................................. 12
Figure 4-4. Valid eye width variation dependent on the signal trace length and impedance ................ 12
Figure 4-5. Typical Schematic for Samsung eMMC5.x ........................................................................ 12
Figure 5-1. Bad example using buried via and recommendation .......................................................... 16
Table 1-1. Samsung Available Packages of eMMC (embedded Multimedia Card) ................................ 5
Table 1-2. IO speed of Samsung eMMC’s .............................................................................................. 5
Table 2-1. Signal and Supply Configuration of Samsung eMMC .......................................................... 6
Table 2-2. Nominal Voltage levels of Power Supplies of Samsung eMMC ........................................... 6
Table 4-1. Recommended Maximal Signal Line Length and Length Difference on Board .................... 9
Table 4-2. Tolerance of PDN ................................................................................................................ 14
Table 4-3. The Minimal Capacitance and the Maximal Inductance for the Decoupling Capacitors .... 15