理解嵌入式系统中的I/O接口：从基础到实践

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"本章是关于嵌入式系统中输入/输出（I/O）系统的详细介绍，特别是与基于ARM架构的单板计算机如树莓派的交互。内容涵盖I/O设备的基本原理、接口设计、程序访问，以及不同类型的外设如通用I/O、串行I/O、模拟I/O、定时器的使用。此外，还讨论了与其他常见设备如字符LCD、VGA显示器、蓝牙无线电和电机的接口，并介绍了总线接口标准AHB-L。" 在计算机科学中，I/O系统是计算机与外部设备——即外围设备——进行通信的关键部分。这些外围设备可以包括个人计算机中的键盘、显示器、打印机和无线网络，也可以是嵌入式系统中的各种组件，如烤面包机的加热元件、娃娃的语音合成器、发动机的燃油喷射器或卫星的太阳能电池板定位马达等。第9.2节介绍将I/O设备连接到处理器的基本原理和编程访问方法。这通常涉及到通过地址总线和数据总线来实现，与访问内存的方式相似。理解如何设计合适的接口和协议对于确保处理器能正确地与I/O设备通信至关重要。第9.3节专注于嵌入式系统中的I/O，以树莓派为例，展示了如何使用其内置的外设，如通用I/O引脚、串行接口和模拟输入/输出，以及如何利用定时器功能。这些基础功能使得开发人员能够构建各种复杂的应用，如控制系统、数据采集或实时事件处理。第9.4节则进一步拓展，提供了一些常见设备的接口示例，如字符LCD显示屏，用于文本显示；VGA显示器，用于图形输出；蓝牙无线电，用于无线通信；以及电机，用于驱动机械装置。这些例子有助于读者理解如何将这些设备集成到嵌入式系统中，以实现特定的功能需求。最后，第9.5节讨论了总线接口，这是连接多个硬件组件的标准方式。通过举例说明流行的高级高性能总线（AHB-L）接口，读者可以了解到如何设计和实现高效的系统级通信，这对于理解和优化嵌入式系统性能至关重要。该章节全面涵盖了I/O系统的基础知识，以及在实际应用中如何与基于ARM的嵌入式系统配合使用，对于学习和实践嵌入式系统设计的工程师来说是宝贵的资源。

9.3.4 Serial I/O

If a microcontroller needs to send more bits than the number of free GPIO

pins, it must break the message into multiple smaller transmissions. In

each step, it can send either one bit or several bits. The former is called

serial I/O and the latter is called parallel I/O. Serial I/O is popular because

it uses few wires and is fast enough for many applications. Indeed, it is so

popular that many standards for serial I/O have been established and

microcontrollers offer dedicated hardware to easily send data via these

standards. This section describes the Serial Peripheral Interface (SPI) and

Universal Asynchronous Receiver/Transmitter (UART) standard serial

interfaces.

Other common serial standards include Inter-Integrated Circuit

C), Universal Serial Bus (USB), and Ethernet. I

C (pronounced “I

squared C”) is a 2-wire interface with a clock and a bidirectional data

pin; it is used in a fashion similar to SPI. USB and Ethernet are more

complex, high-performance standards described in Sections 9.6.1 and

9.6.4, respectively. All five of these standards are supported on the

Raspberry Pi.

// Set GPIO 4:2 as inputs

pinMode(2, INPUT);

pinMode(3, INPUT);

pinMode(4, INPUT);

// Set GPIO 9:7 as an output

pinMode(7, OUTPUT);

pinMode(8, OUTPUT);

pinMode(9, OUTPUT);

while (1) { // Read each switch and write corresponding LED

digitalWrite(7, digitalRead(2));

digitalWrite(8, digitalRead(3));

digitalWrite(9, digitalRead(4));

}

Assuming the program is in a file named dip2led.c and that EasyPIO.h is in the

same directory, you can compile and run the program using the following com-

mands on the Raspberry Pi command line

.gcc is the C compiler. Note that sudo

is required so that the program can access the protected I/O memory. To stop a

running program, press Ctrl-C.

gcc dip2led.c –o dip2led

sudo ./dip2led

9.3 Embedded I/O Systems

531.e11

9.3.4.1 Serial Peripheral Interface (SPI)

SPI (pronounced “S-P-I”) is a simple synchronous seri al protocol that is

easy to use and relatively fast. The physical interface consists of three

pins: Serial Clock (SCK), Master Out Slave In (MOSI, also known as

SDO), and Master In Slave Out (MISO, also known as SDI). SPI connects

a master device to a slave device, as shown in Figure e9.6(a). The master

produces the clock. It initiates communication by sending a series of clock

pulses on SCK. If it wants to send data to the slave, it puts the data on

MOSI, starting with the most significant bit. The slave may simulta-

neously respond by putting data on MISO. Figure e9.6(b) shows the SPI

waveforms for an 8-bit data transmission. Bits change on the falling edge

of SCK and are stable to sample on the rising edge. The SPI interface may

also send an active-low chip enable to alert the receiver that data is

coming.

The BCM2835 has three SPI master ports and one slave port. This

section describes SPI Master Port 0, which is readily accessible on the

Raspberry Pi on GPIO pins 11:9. To use these pins for SPI rather than

GPIO, their GPFSEL must be set to ALT0. The Pi must then configure

the port. When the Pi writes to the SPI, the data is transmitted serially

to the slave. Simultaneously, data received from the slave is collected

and the Pi can read it when the transfer is complete.

Master

SCK

MOSI

MISO

SCK

MOSI

MISO

Slave

(a)

SCK

(b)

MOSI

MISO

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

SPI_CE0

(optional)

Figure e9.6 SPI connection and waveforms

SPI always sends data in both

directions on each transfer. If the

system only needs unidirectional

communication, it can ignore the

unwanted data. For example, if

the master only needs to send

data to the slave, the byte

received from the slave can be

ignored. If the master only needs

to receive data from the slave, it

must still trigger the SPI

communication by sending an

arbitrary byte that the slave will

ignore. It can then read the data

received from the slave. The SPI

clock only toggles while the

master is transmitting data.

531.e12 CHAPTER NINE I/O Systems

SPI Master Port 0 is associated with three registers, given in the mem-

ory map in Figure e9.7. SPI0CS is the control register. It is used to turn

the SPI on and set attributes such as the polarity of the clock. Table

e9.4 lists the names and functions of some of the bits in SPI0CS that are

relevant to this discussion. All have a default value of 0 on reset. Most

of the fun ctions, such as chip selects and interrupts, are not used in this

section but can be found in the datasheet. SPI0FIFO is written to transmit

a byte and read to get the byte received back. SPI0CLK configures the S PI

clock frequency by dividing the 250 MHz peripheral clock by a power of

two specified in the register. Thus, the SPI clock frequency is summarized

in Table e9.5.

0x20204000 SPI0CS

SPI0FIFO

SPI0CLK

0x20204004

0x20204008

...

Figure e9.7 SPI Master Port 0

registers

Table e9.4 SPI0CS register fields

Bit Name Function Meaning for 0 Meaning for 1

16 DONE Transfer Done Transfer in

progress

Transfer complete

7 TA Transfer Active SPI disabled SPI enabled

3 CPOL Clock Polarity Clock idles low Clock idles high

2 CPHA Clock Phase First SCK

transition at

middle of data bit

First SCK

transition at beginning

of data bit

Table e9.5 SPI0CLK frequencies

SPI0CLK

SPI

Frequency

(kHz)

2 125000

4 62500

8 31250

16 15625

32 7812

64 3906

128 1953

256 976

512 488

1024 244

2048 122

If the frequency is too high

(>~1 MHz on a breadboard or

tens of MHz on an unterminated

printed circuit board), the SPI

may become unreliable due to

reflections, crosstalk, or other

signal integrity issues.

Example e9.4 SENDING AND RECEIVING BYTES OVER SPI

Design a system to communicate between a Raspberry Pi master and an FPGA

slave over SPI. Sketch a schematic of the interface. Write the C code for the Pi

to send the character ‘A ’ and receive a character back. Write HDL code for an

SPI slave on the FPGA. How could the slave be simplified if it only needs to

receive data?

Solution: Figure e9.8 shows the connection between the devices using SPI

Master Port 0. The pin numbers are obtained from the component datasheets

(e.g., Figure e9.3). Notice that both the pin numbers and signal names are shown

on the diagram to indicate both the physical and logical connectivity. When the

SPI is enabled, these pins cannot be used for GPIO.

9.3 Embedded I/O Systems 531.e13

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艾苛尔

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