深度探索：Intel CPU指令集参考手册

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"Intel Architecture Software Developer’s Manual Volume 2: Instruction Set Reference" Intel的CPU学习是一个深度探索计算机硬件和软件交互的重要过程。《Intel Architecture Software Developer’s Manual》是Intel公司提供的一套权威参考资料，旨在帮助开发者理解和利用Intel处理器的架构。这套手册分为三个卷：基础架构、指令集参考和系统编程指南。 "Volume 2: Instruction Set Reference"是其中的关键部分，它详细列出了Intel处理器支持的所有指令集，包括每条指令的语法、操作、使用场景以及可能产生的效果。对于想要深入理解CPU工作原理，尤其是进行汇编语言编程或低级系统开发的人员来说，这是不可或缺的资源。学习这本手册，你将能够了解到： 1. **指令集详解**：手册涵盖了从基本算术和逻辑运算到复杂控制流指令、浮点运算、多媒体扩展指令（如SSE、AVX系列）等，这些都是CPU执行程序的基础。 2. **寻址模式**：了解各种寻址方式如何影响内存访问，这对于优化代码和理解内存操作至关重要。 3. **指令执行时间**：手册通常会提供每个指令的时钟周期数，有助于评估性能和编写高效的汇编代码。 4. **异常和错误处理**：CPU在遇到非法操作、边界条件或其他问题时如何响应，这对系统程序员尤其有用。 5. **处理器状态和寄存器**：掌握CPU中的寄存器和它们的角色，如通用寄存器、标志寄存器等，是理解执行流程的关键。 6. **系统调用和中断**：如何通过中断和系统调用来与操作系统交互，执行特权操作。 7. **兼容性和向后兼容性**：Intel处理器如何处理不同版本间的指令兼容性，这对于升级硬件和软件时保持兼容性很重要。此外，手册还会涉及一些高级特性，例如超线程技术、虚拟化支持、多处理器系统中的同步和通信机制等。同时，Intel可能会随时更新其产品规格和描述，因此持续关注最新版的手册以获取最新的CPU特性和改进是必要的。学习Intel CPU不仅限于阅读这三卷手册，还应结合实践，比如通过编写汇编代码来加深理解，或者利用模拟器和调试工具进行实验。同时，结合其他教程、在线资源和社区讨论，可以加速学习进程并解决实际问题。对Intel的CPU有深入的理解意味着能够更有效地编写高效代码，优化系统性能，并应对各种计算挑战。无论你是软件开发者、系统管理员还是硬件爱好者，这套手册都是提升技能的宝贵资料。

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TABLE OF TABLES

xvi

Table B-15. Streaming SIMD Extensions Instruction Behavior with Prefixes . . . . . . . . . B-25

Table B-16. SIMD Integer Instructions - Behavior with Prefixes . . . . . . . . . . . . . . . . . . . B-25

Table B-17. Cacheability Control Instruction Behavior with Prefixes . . . . . . . . . . . . . . . B-25

Table B-18. Key to Streaming SIMD Extensions Naming Convention. . . . . . . . . . . . . . . B-26

Table B-19. Encoding of the SIMD Floating-Point Register Field . . . . . . . . . . . . . . . . . . B-27

Table B-20. Encoding of the SIMD-Integer Register Field . . . . . . . . . . . . . . . . . . . . . . . . B-34

Table B-21. Encoding of the Streaming SIMD Extensions

Cacheability Control Register Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-35

Table B-22. General Floating-Point Instruction Formats . . . . . . . . . . . . . . . . . . . . . . . . . B-36

Table B-23. Floating-Point Instruction Formats and Encodings. . . . . . . . . . . . . . . . . . . . B-37

Table C-1. Simple Intrinsics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-2

Table C-2. Composite Intrinsics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-11

1-1

CHAPTER 1

ABOUT THIS MANUAL

The Intel Architecture Software Developer’s Manual, Volume 2: Instruction Set Reference

(Order Number 243191) is part of a three-volume set that describes the architecture and

programming environment of all Intel Architecture processors. The other two volumes in this

set are:

• The Intel Architecture Software Developer’s Manual, Volume 1: Basic Architecture (Order

Number 243190).

• The Intel Architecture Software Developer’s Manual, Volume 3: System Programing Guide

(Order Number 243192).

The Intel Architecture Software Developer’s Manual, Volume 1, describes the basic architecture

and programming environment of an Intel Architecture processor; the Intel Architecture Soft-

ware Developer’s Manual, Volume 2, describes the instructions set of the processor and the

opcode structure. These two volumes are aimed at application programmers who are writing

programs to run under existing operating systems or executives. The Intel Architecture Software

Developer’s Manual, Volume 3, describes the operating-system support environment of an Intel

Architecture processor, including memory management, protection, task management, interrupt

and exception handling, and system management mode. It also provides Intel Architecture

processor compatibility information. This volume is aimed at operating-system and BIOS

designers and programmers.

1.1. OVERVIEW OF THE

INTEL ARCHITECTURE SOFTWARE

DEVELOPER’S MANUAL, VOLUME 2

INSTRUCTION SET

REFERENCE

The contents of this manual are as follows:

Chapter 1 — About This Manual. Gives an overview of all three volumes of the Intel Archi-

tecture Software Developer’s Manual. It also describes the notational conventions in these

manuals and lists related Intel manuals and documentation of interest to programmers and hard-

ware designers.

Chapter 2 — Instruction Format. Describes the machine-level instruction format used for all

Intel Architecture instructions and gives the allowable encodings of prefixes, the operand-iden-

tifier byte (ModR/M byte), the addressing-mode specifier byte (SIB byte), and the displacement

and immediate bytes.

Chapter 3 — Instruction Set Reference. Describes each of the Intel Architecture instructions

in detail, including an algorithmic description of operations, the effect on flags, the effect of

operand- and address-size attributes, and the exceptions that may be generated. The instructions

1-2

ABOUT THIS MANUAL

are arranged in alphabetical order. The FPU, MMX™ Technology instructions, and Streaming

SIMD Extensions are included in this chapter.

Appendix A — Opcode Map. Gives an opcode map for the Intel Architecture instruction set.

Appendix B — Instruction Formats and Encodings. Gives the binary encoding of each form

of each Intel Architecture instruction.

Appendix C — Compiler Intrinsics and Functional Equivalents. Gives the Intel C/C++

compiler intrinsics and functional equivalents for the MMX™ Technology instructions and

Streaming SIMD Extensions.

1.2. OVERVIEW OF THE

INTEL ARCHITECTURE SOFTWARE

DEVELOPER’S MANUAL, VOLUME 1

BASIC

ARCHITECTURE

The contents of the Intel Architecture Software Developer’s Manual, Volume 1, are as follows:

Chapter 1 — About This Manual. Gives an overview of all three volumes of the Intel Archi-

tecture Software Developer’s Manual. It also describes the notational conventions in these

manuals and lists related Intel manuals and documentation of interest to programmers and hard-

ware designers.

Chapter 2 — Introduction to the Intel Architecture. Introduces the Intel Architecture and the

families of Intel processors that are based on this architecture. It also gives an overview of the

common features found in these processors and brief history of the Intel Architecture.

Chapter 3 — Basic Execution Environment. Introduces the models of memory organization

and describes the register set used by applications.

Chapter 4 — Procedure Calls, Interrupts, and Exceptions. Describes the procedure stack

and the mechanisms provided for making procedure calls and for servicing interrupts and

exceptions.

Chapter 5 — Data Types and Addressing Modes. Describes the data types and addressing

modes recognized by the processor.

Chapter 6 — Instruction Set Summary. Gives an overview of all the Intel Architecture

instructions except those executed by the processor’s floating-point unit. The instructions are

presented in functionally related groups.

Chapter 7 — Floating-Point Unit. Describes the Intel Architecture floating-point unit,

including the floating-point registers and data types; gives an overview of the floating-point

instruction set; and describes the processor’s floating-point exception conditions.

Chapter 8 — Programming with Intel MMX™ Technology. Describes the Intel MMX™

technology, including registers and data types, and gives an overview of the MMX™ technology

instruction set.

Chapter 9 — Programming with the Streaming SIMD Extensions. Describes the Intel

Streaming SIMD Extensions, including the registers and data types.

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