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For Assessment Purposes Only
Section number Title Page
24.1.2 EWM clocks...................................................................................................................................................425
24.1.3 EWM low-power modes................................................................................................................................ 425
24.1.4 EWM_out pin state in low power modes.......................................................................................................426
24.2 Introduction...................................................................................................................................................................426
24.2.1 Features.......................................................................................................................................................... 426
24.2.2 Modes of Operation....................................................................................................................................... 427
24.2.3 Block Diagram............................................................................................................................................... 428
24.3 EWM Signal Descriptions............................................................................................................................................ 429
24.4 Memory Map/Register Definition.................................................................................................................................429
24.4.1 EWM Register Descriptions.......................................................................................................................... 429
24.5 Functional Description..................................................................................................................................................434
24.5.1 The EWM_out Signal.................................................................................................................................... 434
24.5.2 The EWM_in Signal...................................................................................................................................... 435
24.5.3 EWM Counter................................................................................................................................................436
24.5.4 EWM Compare Registers.............................................................................................................................. 436
24.5.5 EWM Refresh Mechanism.............................................................................................................................436
24.5.6 EWM Interrupt...............................................................................................................................................437
24.5.7 Counter clock prescaler..................................................................................................................................437
Chapter 25
Error Injection Module (EIM)
25.1 Chip-specific EIM information.....................................................................................................................................439
25.1.1 EIM channels................................................................................................................................................. 439
25.1.2 EIM channel assignments.............................................................................................................................. 439
25.1.3 EIM_EICHDn_WORD register bit mapping.................................................................................................439
25.2 Introduction...................................................................................................................................................................440
25.2.1 Overview........................................................................................................................................................441
25.2.2 Features.......................................................................................................................................................... 442
25.3 Memory map and register definition.............................................................................................................................442
25.3.1 Error Injection Module Configuration Register (EIM_EIMCR)................................................................... 443
S32K144 Reference Manual, Rev. 1 Draft H, 02/2016
16
Review Draft
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