SMBIOS 3.3.0规格参考：系统管理BIOS详解

电脑硬件
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"SMBIOS规范3.3.0版，System Management BIOS (SMBIOS) 参考规范" System Management BIOS (SMBIOS) 是一个标准化的接口，它允许操作系统和其他系统软件与计算机硬件进行通信，以获取系统硬件配置信息。SMBIOS规范3.3.0是该标准的最新版本，于2019年8月22日发布，取代了之前的3.2.0版本。这个规范是规范性的，旨在确保不同制造商的硬件在系统管理功能上的兼容性和互操作性。 SMBIOS的主要目标是提供一种通用的方法来描述个人计算机系统的硬件组件，如主板、处理器、内存、存储设备等。通过这个接口，系统固件（通常是指UEFI固件）可以向操作系统提供关于系统硬件的详细信息，这些信息对于系统的启动、配置和管理至关重要。例如，操作系统可以利用SMBIOS数据来识别硬件组件的类型、制造商、版本和物理位置，以便正确地驱动和管理它们。 SMBIOS规范由Distributed Management Task Force (DMTF) 维护和发布，这是一个致力于推动企业级和系统管理以及互操作性的非营利组织。DMTF的成员包括业界领先的公司，它们共同制定和更新这些标准。任何个人或组织都可以在给予适当署名的情况下复制和使用DMTF的规范，但需要注意的是，随着规范的更新，应该始终引用当前的版本和发布日期。 实施SMBIOS标准可能涉及到第三方的专利权问题，包括临时专利权。DMTF不对其使用者保证是否存在这些专利权，并且不对识别、披露或处理这些专利权负责。这意味着硬件制造商在实现SMBIOS标准时，需要自行评估可能存在的专利风险。 SMBIOS规范3.3.0可能包含对之前版本的改进和扩展，以适应不断发展的硬件技术和管理需求。例如，新版本可能会添加新的结构类型以支持新兴技术，或者改进现有的结构以提高数据的准确性和效率。此外，它还可能包含对错误的修正和对标准清晰度的提升，以减少实现过程中的歧义。 SMBIOS 3.3.0是一个关键的规范，它促进了硬件信息的标准化，确保了系统管理软件与硬件之间的有效沟通，从而提高了整个计算环境的管理和维护效率。对于IT专业人员来说，理解并熟悉SMBIOS规范是诊断硬件问题、优化系统性能和进行系统集成工作的重要基础。

SMBIOS Spec 3. 2 2018

2018-06-13 上传
System Management BIOS (SMBIOS) Reference 6 Specification 7 Supersedes: 3.1.1 8 Document Class: Normative 9 Document Status: Published 10 Document Language: en-US 11System Management BIOS (SMBIOS) Reference Specification DSP0134 2 Published Version 3.2.0 12 Copyright Notice 13 Copyright © 2000, 2002, 2004–2016 Distributed Management Task Force, Inc. (DMTF). All rights 14 reserved. 15 DMTF is a not-for-profit association of industry members dedicated to promoting enterprise and systems 16 management and interoperability. Members and non-members may reproduce DMTF specifications and 17 documents, provided that correct attribution is given. As DMTF specifications may be revised from time to 18 time, the particular version and release date should always be noted. 19 Implementation of certain elements of this standard or proposed standard may be subject to third party 20 patent rights, including provisional patent rights (herein "patent rights"). DMTF makes no representations 21 to users of the standard as to the existence of such rights, and is not responsible to recognize, disclose, 22 or identify any or all such third party patent right, owners or claimants, nor for any incomplete or 23 inaccurate identification or disclosure of such rights, owners or claimants. DMTF shall have no liability to 24 any party, in any manner or circumstance, under any legal theory whatsoever, for failure to recognize, 25 disclose, or identify any such third party patent rights, or for such party’s reliance on the standard or 26 incorporation thereof in its product, protocols or testing procedures. DMTF shall have no liability to any 27 party implementing such standard, whether such implementation is foreseeable or not, nor to any patent 28 owner or claimant, and shall have no liability or responsibility for costs or losses incurred if a standard is 29 withdrawn or modified after publication, and shall be indemnified and held harmless by any party 30 implementing the standard from any and all claims of infringement by a patent owner for such 31 implementations. 32 For information about patents held by third-parties which have notified the DMTF that, in their opinion, 33 such patent may relate to or impact implementations of DMTF standards, visit 34 http://www.dmtf.org/about/policies/disclosures.php. 35 This document’s normative language is English. Translation into other languages is permitted.DSP0134 System Management BIOS (SMBIOS) Reference Specification Version 3.2.0 Published 3 36 CONTENTS 37 Foreword ....................................................................................................................................................... 9 38 Introduction.................................................................................................................................................. 10 39 Document conventions........................................................................................................................ 10 40 Typographical conventions ....................................................................................................... 10 41 Document version number conventions ................................................................................... 10 42 1 Scope .................................................................................................................................................. 13 43 1.1 Supported processor architectures........................................................................................... 13 44 2 Normative references .......................................................................................................................... 13 45 3 Terms and definitions .......................................................................................................................... 15 46 4 Symbols and abbreviated terms.......................................................................................................... 15 47 5 Accessing SMBIOS information .......................................................................................................... 21 48 5.1 General ..................................................................................................................................... 21 49 5.2 Table convention....................................................................................................................... 21 50 5.2.1 SMBIOS 2.1 (32-bit) Entry Point.................................................................................. 22 51 5.2.2 SMBIOS 3.0 (64-bit) Entry Point.................................................................................. 23 52 6 SMBIOS structures.............................................................................................................................. 24 53 6.1 Structure standards................................................................................................................... 24 54 6.1.1 Structure evolution and usage guidelines.................................................................... 25 55 6.1.2 Structure header format............................................................................................... 26 56 6.1.3 Text strings .................................................................................................................. 26 57 6.2 Required structures and data ................................................................................................... 27 58 6.3 SMBIOS fields and CIM MOF properties.................................................................................. 28 59 7 Structure definitions............................................................................................................................. 29 60 7.1 BIOS Information (Type 0)........................................................................................................ 29 61 7.1.1 BIOS Characteristics.................................................................................................... 31 62 7.1.2 BIOS Characteristics Extension Bytes......................................................................... 32 63 7.2 System Information (Type 1) .................................................................................................... 33 64 7.2.1 System — UUID........................................................................................................... 34 65 7.2.2 System — Wake-up Type............................................................................................ 35 66 7.3 Baseboard (or Module) Information (Type 2) ........................................................................... 35 67 7.3.1 Baseboard — feature flags .......................................................................................... 36 68 7.3.2 Baseboard — Board Type ........................................................................................... 37 69 7.4 System Enclosure or Chassis (Type 3) .................................................................................... 37 70 7.4.1 System Enclosure or Chassis Types........................................................................... 39 71 7.4.2 System Enclosure or Chassis States........................................................................... 40 72 7.4.3 System Enclosure or Chassis Security Status ............................................................ 41 73 7.4.4 System Enclosure or Chassis — Contained Elements................................................ 41 74 7.5 Processor Information (Type 4) ................................................................................................ 42 75 7.5.1 Processor Information — Processor Type................................................................... 45 76 7.5.2 Processor Information — Processor Family ................................................................ 46 77 7.5.3 Processor ID field format ............................................................................................. 52 78 7.5.4 Processor Information — Voltage................................................................................ 52 79 7.5.5 Processor Information — Processor Upgrade............................................................. 53 80 7.5.6 Processor Information — Core Count.......................................................................... 55 81 7.5.7 Processor Information — Core Enabled...................................................................... 55 82 7.5.8 Processor Information — Thread Count...................................................................... 56 83 7.5.9 Processor Characteristics............................................................................................ 56 84 7.6 Memory Controller Information (Type 5, Obsolete) .................................................................. 57 85 7.6.1 Memory Controller Error Detecting Method................................................................. 58 86 7.6.2 Memory Controller Error Correcting Capability............................................................ 58 87 7.6.3 Memory Controller Information — Interleave Support................................................. 58System Management BIOS (SMBIOS) Reference Specification DSP0134 4 Published Version 3.2.0 88 7.6.4 Memory Controller Information — Memory Speeds .................................................... 59 89 7.7 Memory Module Information (Type 6, Obsolete) ...................................................................... 59 90 7.7.1 Memory Module Information — Memory Types .......................................................... 60 91 7.7.2 Memory Module Information — Memory Size ............................................................. 60 92 7.7.3 Memory subsystem example ....................................................................................... 61 93 7.8 Cache Information (Type 7) ...................................................................................................... 63 94 7.8.1 Cache Information — Maximum Cache Size and Installed Size ................................. 65 95 7.8.2 Cache Information — SRAM Type .............................................................................. 65 96 7.8.3 Cache Information — Error Correction Type ............................................................... 66 97 7.8.4 Cache Information — System Cache Type ................................................................. 66 98 7.8.5 Cache Information — Associativity.............................................................................. 66 99 7.9 Port Connector Information (Type 8) ........................................................................................ 67 100 7.9.1 Port Information example............................................................................................. 68 101 7.9.2 Port Information — Connector Types .......................................................................... 68 102 7.9.3 Port Types.................................................................................................................... 69 103 7.10 System Slots (Type 9)............................................................................................................... 70 104 7.10.1 System Slots — Slot Type ........................................................................................... 71 105 7.10.2 System Slots — Slot Data Bus Width.......................................................................... 73 106 7.10.3 System Slots — Current Usage................................................................................... 74 107 7.10.4 System Slots — Slot Length ........................................................................................ 74 108 7.10.5 System Slots — Slot ID ............................................................................................... 74 109 7.10.6 Slot Characteristics 1................................................................................................... 75 110 7.10.7 Slot Characteristics 2................................................................................................... 75 111 7.10.8 Segment Group Number, Bus Number, Device/Func

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