TC3xx MCAL PWM用户手册：GtmCcu6模块

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"EB Tresos TC3xx MCAL PWM 用户手册" 本文档是EB Tresos针对32位TriCore TMAURIX TM TC3xx微控制器家族的MCAL（Microcontroller Abstraction Layer，微控制器抽象层）PWM（脉宽调制）模块的用户手册。该手册的目标在于帮助用户集成MCAL软件，使其与基本软件（BSW）栈协同工作。手册详细介绍了集成者在整合MCAL软件时的责任，包括安全、配置和功能的详细信息，同时提供了显著特性使用的实例。 **重要知识点：** 1. **MCAL软件**：这是用于微控制器的软件层，它提供了一种抽象，将底层硬件操作封装在易于使用的API中，允许开发者专注于应用逻辑而不是硬件细节。 2. **TriCore TMAURIX TM TC3xx**：这是一款32位微控制器，由Infineon Technologies制造，设计用于高性能和低功耗的应用。 3. **PWM模块**：PWM是一种控制信号占空比的技术，常用于电机控制、电源管理、LED亮度调节等应用。Pwm_17_GtmCcu6是特定于TC3xx的PWM实现。 4. **安全配置**：手册详细阐述了如何确保PWM模块的安全性，这对于涉及关键安全系统的应用至关重要。 5. **配置信息**：提供了如何设置和调整PWM参数以满足不同需求的方法，包括频率、占空比、极性等。 6. **使用示例**：通过实例，用户可以学习如何调用API（应用程序接口），设置PWM通道，以及如何根据需求启动和停止PWM输出。 7. **文档约定**：定义了文档中各种文本样式的意义，如粗体表示标题和关键元素，斜体表示变量和引用，而Courier New字体则用于表示API函数名。 **目标受众**：本手册面向所有使用TC3xx MCAL软件的Pwm_17_GtmCcu6模块的开发者，无论其经验水平如何。 **通用信息**：虽然本手册专注于PWM模块，但还提及了通用的MCAL用户手册，其中包含了包安装、安全和其他适用于所有模块的通用信息。此用户手册是开发者在使用EB Tresos的TC3xx MCAL PWM模块时的重要参考资料，它不仅提供了必要的技术细节，还提供了实践指导，有助于用户高效地利用这个强大的微控制器功能。

1.1.4.1 Intergration with AUTOSAR stack

This section lists the modules, which are not part of MCAL, but are required to integrate the PWM driver.

• EcuM

The ECU Manager module is a part of the AUTOSAR stack that manages common aspects of the ECU.

Specifically, in the context of MCAL, the EcuM is used for initialization and de-initialization of the soware

drivers. The EcuM module provided in the MCAL package is a stub code and needs to be replaced with a

complete EcuM module during the integration phase.

Initialization of PWM:

The user of PWM driver may use APIs of EcuM to initialize the driver. The initialization of the PWM driver

should be invoked from each CPU core, which intends to use the services of the PWM driver. All cores can

execute initialization simultaneously.

De-initialization of PWM:

The user of PWM driver may use APIs of EcuM to de-initialize the driver. The de-initialization of the PWM

driver should be invoked from each CPU core that uses the services of the PWM driver. All cores can execute

de-initialization simultaneously.

• Memory mapping

Memory mapping is a concept from AUTOSAR that allows relocation of text, variables, constants and

configuration data to user-specific memory regions. To achieve this, all the relocatable elements of

the driver are encapsulated in dierent memory-section macros. These macros are defined in the

Pwm_17_GtmCcu6_MemMap.h file.

The Pwm_17_GtmCcu6_MemMap.h file is provided in the MCAL package as a stub code. The integrator must place

appropriate compiler pragmas within the memory-section macros. The pragmas ensure that the elements

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are relocated to the correct memory region. A sample implementation listing the memory-section macros

is shown as follows:

/**** GLOBAL RAM DATA -- NON-CACHED LMU ****/

#if defined PWM_17_GTMCCU6_START_SEC_VAR_CLEARED_ASIL_B_GLOBAL_UNSPECIFIED

/*****User pragmas here for Non-cached LMU*****/

#undef PWM_17_GTMCCU6_START_SEC_VAR_CLEARED_ASIL_B_GLOBAL_UNSPECIFIED

#undef MEMMAP_ERROR

#elif defined PWM_17_GTMCCU6_STOP_SEC_VAR_CLEARED_ASIL_B_GLOBAL_UNSPECIFIED

#ifdef _TASKING_C_TRICORE_

/*****User pragmas here for Non-cached LMU*****/

#undef PWM_17_GTMCCU6_STOP_SEC_VAR_CLEARED_ASIL_B_GLOBAL_UNSPECIFIED

#undef MEMMAP_ERROR

/**** CORE[x] CONFIG DATA -- PF[x] ****/ /*[x]=0..5*/

#elif defined PWM_17_GTMCCU6_START_SEC_CONFIG_DATA_ASIL_B_CORE[x]_UNSPECIFIED

/*****User pragmas here for PF[x]*****/

#undef PWM_17_GTMCCU6_START_SEC_CONFIG_DATA_ASIL_B_CORE0_UNSPECIFIED

#undef MEMMAP_ERROR

#elif defined PWM_17_GTMCCU6_STOP_SEC_CONFIG_DATA_ASIL_B_CORE0_UNSPECIFIED

/*****User pragmas here for PF[x]*****/

#undef PWM_17_GTMCCU6_STOP_SEC_CONFIG_DATA_ASIL_B_CORE0_UNSPECIFIED

#undef MEMMAP_ERROR

/**** CODE -- PF[x] ****/

#elif defined PWM_17_GTMCCU6_START_SEC_CODE_ASIL_B_GLOBAL

/*****User pragmas here for PF[x]*****/

#undef PWM_17_GTMCCU6_START_SEC_CODE_ASIL_B_GLOBAL

#undef MEMMAP_ERROR

#elif defined PWM_17_GTMCCU6_STOP_SEC_CODE_ASIL_B_GLOBAL

/*****User pragmas here for PF[x]*****/

#undef PWM_17_GTMCCU6_STOP_SEC_CODE_ASIL_B_GLOBAL

#undef MEMMAP_ERROR

#endif

#if defined MEMMAP_ERROR

#error "Pwm_17_GtmCcu6_MemMap.h, wrong pragma command"

#endif

• DET

The DET module is a part of the AUTOSAR stack that handles all the development and runtime errors

reported by the BSW modules. The PWM driver reports all the development errors to the DET module

through the Det_ReportError() API. The user of the PWM driver must process all the errors reported to the

DET module through the Det_ReportError() API.

The Det.h and Det.c files are provided in the MCAL package as a stub code and needs to be replaced with a

complete DET module during the integration phase.

• DEM

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The DEM module is not required for the integration of the PWM driver.

• SchM

The SchM module is a part of the RTE that manages the BSW scheduler. The PWM driver uses the exclusive

areas defined in the SchM_Pwm_17_GtmCcu6.h file to protect the SFRs and variables from concurrent accesses

from dierent threads. The SchMs identified for the PWM driver are:

HandleNotification critical section to protect update of notification related global variable and SFRs

PeriodAndDutyUpdate critical section to protect update of period and duty related shadow SFRs

The SchM_Pwm_17_GtmCcu6.h and SchM_Pwm_17_GtmCcu6.c files are provided in the MCAL package as an

example code and needs to updated by the integrator. The user must implement the SchM functions

defined by the PWM driver as suspend / resume of interrupts for the CPU on which the API is invoked. A

sample implementation of the SchM functions is shown as follows:

/**** Sample implementation of SchM_Pwm_17_GtmCcu6.c ****/

#include "Os.h"

void SchM_Enter_Pwm_17_GtmCcu6_HandleNotification(void)

{

/* Start of Critical Section */

SuspendAllInterrupts();/* Suspend CPU core interrupt */

}

void SchM_Exit_Pwm_17_GtmCcu6_HandleNotification(void)

{

/* End of Critical Section */

ResumeAllInterrupts();/* Resume CPU core interrupt */

}

void SchM_Enter_Pwm_17_GtmCcu6_PeriodAndDutyUpdate(void)

{

/* Start of Critical Section */

SuspendAllInterrupts();/* Suspend CPU core interrupt */

}

void SchM_Exit_Pwm_17_GtmCcu6_PeriodAndDutyUpdate(void)

{

/* End of Critical Section */

ResumeAllInterrupts();/* Resume CPU core interrupt */

}

• Safety error

The PWM driver reports all the detected safety errors through the Mcal_ReportSafetyError() API.

The driver performs only detection and reporting of the safety errors. The handling of the reported errors

shall be done by the user. The Mcal_ReportSafetyError() API is provided in the Mcal_SafetyError.c and

Mcal_SafetyError.h files as a stub code, and must be updated by the integrator to handle the reported

errors.

Note: All DET errors are also reported as safety errors (error code used is same as DET).

• Notifications and callbacks

The PWM driver does not implement any notifications. However, the PWM driver reports the rising/falling/

both edges through notification functions. These notification functions can be configured by the user in the

EB Tresos for each PWM channel separately.

The PWM driver does not expect any callbacks from application but it needs a callback from the Mcu

module for ISR handling.

• Operating system(OS)

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The OS or application must ensure correct type of service and interrupt priority is configured in the SR

The OS files provided by the MCAL package is only an example code and must be updated by the integrator

with the actual OS files for the desired function.

1.1.4.2 Multicore and Resource Manager

The PWM driver supports execution of its APIs simultaneously from all CPU cores. The user should allocate

logical PWM channels to the CPU cores at pre-compile time using the Resource manager module. The following

are the key points to be considered with respect to multicore in the driver:

• Logical PWM channels are allocated to CPU cores at pre-compile time. For example, Pwm_Channel0,

Pwm_Channel1

• It must be ensured that PWM channel id passed as parameter while invoking an API belongs to the same

core

• DETs are raised in case APIs are invoked with mismatch of core and channel id

• Interrupts raised by a PWM channel must be serviced by the CPU core to which the channel has been

allocated to

• PWM channels using GTM-ATOM, channel GTM-ATOM[i]_CH[X] and ATOM[i]_CH[x+1] must be allocated to

the same core as these two channels share the same interrupt line

• PWM channels using GTM-TOM, channel GTM-TOM[i]_CH[X] and TOM[i]_CH[x+1] must be allocated to the

same core as these two channels share the same interrupt line

• Locating constants, variables and configuration data to the correct memory space should be done by the

user. Memory sections are marked GLOBAL (common to all cores) and CORE[x](specific to a CPU core). The

following should be considered by the user to ensure better performance of the driver:

Code section:

The executable code of the PWM driver is placed under single MemMap section. It can be relocated to any

PFlash.

Data section:

The RAM variable memory sections marked as specific to core should be relocated to the DSPR/DLMU of

the same core. The sections marked as global should be relocated to the non-cached LMU region.

Configuration data and constants:

The configuration data section sections marked as specific to core should be relocated to the PFlash of the

same core. The sections marked as global should be relocated to the PFlash of the master core.

Note: Relocating code, data and constants to a distant memory space would impact execution timings.

Note: If the driver operates from single (master) core, all the sections may be relocated to the PFlash/DSPR/

DLMU of the same CPU core.

1.1.4.3 MCU support

The PWM driver is dependent on the MCU driver for clock configuration, GTM timer to port pin connections and

timer IP-related services. The initialization of the PWM driver must be started only aer completing the MCU

initialization. The following must be considered while configuring the MCU driver in tresos:

• The GTM/CCU6 hardware timers used by the PWM driver must be reserved in the MCU configuration for

exclusive use by the PWM

• For signal output, the GTM timer to port pin connections should be configured in the MCU configuration for

each TOM/ATOM channel allocated for PWM

Access of shared GTM SFRs

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