"HDMI转接驱动器TI-TDP158.pdf技术文档"

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The TI TDP158 is a high-performance HDMI conversion driver designed to provide reliable and efficient HDMI signal transmission. This product is widely used in various applications such as televisions, monitors, projectors, and audio/video equipment. The TDP158 supports multiple input and output channels, including IN_CLKp/n, OUT_CLKp/n, IN_D1p/n, OUT_D1p/n, IN_D0p/n, OUT_D0p/n, OUT_D2p/n, and IN_D2p/n. These channels are essential for transmitting data and clock signals, ensuring smooth and accurate HDMI signal conversion. One of the key features of the TDP158 is its compatibility with HDMI specifications. It supports both TMDS (Transition Minimized Differential Signaling) and AC coupling, ensuring compatibility with HDMI 1.4b and HDMI 2.0. To improve signal quality and reduce noise interference, the TDP158 incorporates various advanced technologies. It supports 5VSDA_SRC, SCL_SRC, SDA_SNK, SCL_SNK, HPD_SRC, HPD_SNK, SDA_CTL, and SCL_CTL interfaces. These interfaces help in controlling the HDMI signal transmission and provide stability and reliability. Furthermore, the TDP158 supports 3.3VDP and TXOrA coupling, which enables efficient signal transmission and reduces power consumption. These features are essential for high-definition video streaming and audio playback. The TDP158 is designed and manufactured by Texas Instruments Incorporated, a global leader in semiconductor manufacturing. Texas Instruments is known for its high-quality products and innovative solutions in the electronics industry. In conclusion, the TDP158 HDMI conversion driver is a reliable and efficient solution for transmitting HDMI signals in various applications. Its multiple input and output channels, compatibility with HDMI specifications, advanced technologies for signal quality improvement, and the reputation of Texas Instruments make it a reliable choice for any HDMI signal conversion needs.

TDP158

ZHCSFY1C –DECEMBER 2016–REVISED OCTOBER 2019

www.ti.com.cn

(1) Does not support Level 3 Swing or Pre-emphasis

6.9 Electrical Characteristics, TMDS Differential Output in DP-Mode

over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX

(1)

UNIT

(TX_DIFFPP_LVL0)

Differential peak-to-peak output

voltage level 0

Based on default state of

V0_P0_VOD register

415 V

(TX_DIFFPP_LVL1)

Differential peak-to-peak output

voltage level 1

Based on default state of

V1_P0_VOD register

660 V

(TX_DIFFPP_LVL2)

Differential peak-to-peak output

voltage level 2

Based on default state of

V2_P0_VOD register

880 V

ΔV

OD(L0L1)

Output peak-to-peak differential

voltage delta

ΔV

ODn

= 20×log(V

ODL(n+1)

ODL(n

)) measured in compliance

with latest PHY CTS 1.2

1 6 dB

ΔV

OD(L1L2)

1 5 dB

(TX_PRE_RATIO_0)

Pre-emphasis level 0 RBR, HBR and HBR2 0 dB

(TX_PRE_RATIO_1)

Pre-emphasis level 1 RBR, HBR and HBR2 2 4.2 dB

(TX_PRE_RATIO_2)

Pre-emphasis level 2 RBR, HBR and HBR2 5 7.2 dB

ΔV

PRE(L1L0)

Pre-emphasis delta

Measured in compliance with

latest PHY CTS 1.2

2 dB

ΔV

PRE(L2L1)

1.6 dB

TDP158

www.ti.com.cn

ZHCSFY1C –DECEMBER 2016 –REVISED OCTOBER 2019

(1) The Typical rating is simulated at 3.3 V V

and 1.1 V V

and at 27°C temperature unless otherwise noted

(2) The Maximum rating is simulated at 3.6 V V

and 1.27 V V

and at 85°C temperature unless otherwise noted

6.10 Switching Characteristics, TMDS

PARAMETER TEST CONDITIONS MIN TYP

(1)

MAX

(2)

UNIT

Data rate 250 6000 Mbps

T(DATA)

Transition time (rise and fall time);

measured at 20% and 80%.

SDA_CTL = L, OE = H, All Data

Rates

Note: Data lane control by I2C only:

See Slew Rate Control

Reg0Ah[1:0] = 11 (default) 60 ps

Reg0Ah[1:0] = 10 80 ps

Reg0Ah[1:0] = 01 95 ps

Reg0Ah[1:0] = 00 110 ps

T(CLOCK)

TERM = H; Reg0Bh[7:6] = 11 122 ps

Reg0Bh[7:6] = 10 150 ps

TERM = L; Reg0Bh[7:6] = 00 180 ps

TERM = NC; Reg0Bh[7:6] = 01 203 ps

(1) The Typical rating is simulated at 3.3 V V

and 1.1 V V

and at 27°C temperature unless otherwise noted

(2) The Maximum rating is simulated at 3.6 V V

and 1.27 V V

and at 85°C temperature unless otherwise noted

6.11 Switching Characteristics, HPD

over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP

(1)

MAX

(2)

UNIT

PD(HPD)

Propagation delay from HPD_SNK

to HPD_SRC; rising edge and falling

edge

see Figure 图 11; not valid during

switching time

40 120 ns

T(HPD)

HPD logical disconnected timeout see 图 12 2 ms

6.12 Switching Characteristics, DDC and I

over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Rise time of both SDA and SCL

signals

= 3.3 V; See 图 15 300 ns

Fall time of both SDA and SCL

signals

See 图 15 300 ns

HIGH

Pulse duration , SCL high See 图 14 0.6 μs

LOW

Pulse duration , SCL low See 图 14 1.3 μs

SU1

Setup time, SDA to SCL See 图 14 100 ns

ST, STA

Setup time, SCL to start condition See 图 14 0.6 μs

HD,STA

Hold time, start condition to SCL See 图 13 0.6 μs

HD,DAT

Data Hold Time 0 ns

VD,DAT

Data valid time 0.9 µs

VD,ACK

Data valid acknowledge time 0.9 µs

ST,STO

Setup time, SCL to stop condition See 图 13 0.6 μs

(BUF)

Bus free time between stop and start

condition

See 图 13 1.3 μs

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