IEEE 1588-2008：精密时钟同步协议

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"IEEE Std 1588-2008是IEEE（电气与电子工程师协会）发布的一个标准，用于网络测量和控制系统中的精确时钟同步协议。该标准旨在为利用网络通信、本地计算和分布式对象技术实现的测量和控制系统提供高精度的时钟同步方案。它适用于通过包网络进行通信的系统，并且能够使具有不同内在精度、分辨率和稳定性的异构系统实现同步。" 《IEEE Std 1588-2008：精确时钟同步协议详解》 IEEE Std 1588-2008，也称为PTP（Precision Time Protocol），是一项重要的网络时间同步标准，由IEEE Instrumentation and Measurement Society的Sensor Technology Technical Committee (TC-9)赞助制定。这个标准是对2002年版本的更新，旨在提高网络中设备间的时钟同步精度，以满足测量和控制系统对时间敏感应用的需求。 1. **协议简介**： IEEE 1588协议定义了一种机制，使得网络中的各个设备能够调整它们的时钟，从而达到微秒甚至纳秒级别的精度。这对于需要精确时间同步的多种应用场景至关重要，如电力系统自动化、电信网络、视频流传输以及分布式数据采集系统等。 2. **适用范围**：该协议适用于使用包交换网络（如以太网）的系统，可以跨越各种不同的硬件和软件平台，包括嵌入式系统、服务器和传感器节点等。协议的设计考虑到了网络中的延迟和不一致性，确保在异构环境中实现高效、准确的时间同步。 3. **协议结构**： IEEE 1588协议包含主时钟和从时钟的概念，主时钟提供参考时间，而从时钟通过网络接收主时钟的同步信息来校准自身。协议还包括了消息传输、时间戳处理、时钟模型和校准算法等关键部分。 4. **主要功能**： - **时间戳处理**：每个时间同步消息都携带发送和接收时间戳，用于计算网络延迟。 - **延迟测量**：通过双向消息传递，设备可以测量发送和接收消息的网络延迟，以补偿网络引起的不确定性。 - **时钟校准**：根据测量的延迟，从时钟调整其内部时钟，以与主时钟保持一致。 - **层次结构**：支持多层主时钟结构，以适应大型、复杂的网络环境。 5. **改进点**：与2002年的版本相比，2008年版的IEEE 1588标准引入了一些改进，如增强的校准算法、更灵活的时钟模型和更好的网络适应性，进一步提高了时间同步的精确度和可靠性。 6. **实际应用**：在实际应用中，IEEE 1588被广泛应用于电力系统中的相量测量单元（PMU）、数据中心的存储区域网络（SAN）以及视频会议和流媒体服务等。这些应用对时间同步有非常严格的要求，IEEE 1588提供了满足这些需求的解决方案。 IEEE Std 1588-2008是网络测量和控制领域的一个核心标准，它的存在极大地推动了需要高精度时间同步的各种技术的发展和应用。随着技术的不断进步，该标准将继续在确保网络设备间精确时间同步方面发挥重要作用。

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Table 105 ⎯Translation of flagField from version 2 to version 1 ...................................................... 181

Table 106 ⎯Version 2 fields with no version 1 counterpart............................................................... 182

Table 107 ⎯Version 1 fields with no version 2 counterpart............................................................... 183

Table 108 ⎯Name correspondence..................................................................................................... 183

Table 109 ⎯Mixed system restrictions............................................................................................... 184

Table B.1⎯Relationships between timescales........................................................................................... 199

Table C.1⎯Interpretation of Figure C.1 key values .................................................................................. 202

Table C.2⎯Interpretation of Figure C.2 key values .................................................................................. 203

Table C.3⎯Interpretation of Figure C.3 key values .................................................................................. 205

Table C.4⎯Interpretation of Figure C.4 key values .................................................................................. 207

Table C.5⎯Interpretation of Figure C.5 key values .................................................................................. 209

Table C.6—Interpretation of Figure C.6 key values .................................................................................. 210

Table C.7—Interpretation of Figure C.7 key values .................................................................................. 211

Table C.8—Interpretation of Figure C.8 key values .................................................................................. 213

Table C.9—Interpretation of Figure C.9 key values .................................................................................. 215

Table C.10—Interpretation of Figure C.10 key values............................................................................... 217

Table C.11—Interpretation of Figure C.11 key values............................................................................... 218

Table D.1⎯IPv4 multicast addresses......................................................................................................... 219

Table D.2⎯transportSpecific field values ................................................................................................. 220

Table E.1⎯IPv6 multicast addresses ......................................................................................................... 222

Table F.1⎯Multicast MAC addresses ....................................................................................................... 223

Table F.2⎯Ethernet transport specific field............................................................................................... 224

Table G.1⎯DeviceNet clockIdentity octets 0 through 7............................................................................ 226

Table G.2⎯DeviceNet headers for all PTP message packets .................................................................... 226

Table H.1⎯ControlNet clockIdentity octets 2 through 7........................................................................... 228

Table I.1⎯Mapping of messages............................................................................................................... 231

Table I.2⎯IEEE 802.3 DLPDU syntax ..................................................................................................... 232

Table I.3⎯Multicast MAC address............................................................................................................ 233

Table I.4⎯LT (Length/Type)..................................................................................................................... 234

Table I.6⎯Mapping of the parameter and attribute names ........................................................................ 235

Table I.7⎯Translation of flagField from PTP version 2 to PROFINET.................................................... 236

Table K.1⎯flagField.SECURE flag .......................................................................................................... 242

Table K.2⎯AUTHENTICATION TLV .................................................................................................... 260

Table K.3⎯algorithmId values .................................................................................................................. 261

Table K.4⎯ICV and pad length................................................................................................................. 261

Table K.5⎯AUTHENTICATION_CHALLENGE TLV .......................................................................... 262

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FIGURES

Figure 1 ⎯Mealy state transition diagram .............................................................................................. 10

Figure 2 ⎯Model of an ordinary clock ................................................................................................... 19

Figure 3 ⎯Model of a boundary clock.................................................................................................... 21

Figure 4 ⎯Model of an end-to-end transparent clock ............................................................................. 22

Figure 5 ⎯End-to-end residence time correction model......................................................................... 23

Figure 6 ⎯Combined ordinary and end-to-end transparent clock........................................................... 25

Figure 7 ⎯Model of a peer-to-peer transparent clock............................................................................. 27

Figure 8 ⎯Peer-to-peer residence time and link delay correction model................................................ 28

Figure 9 ⎯Combined ordinary and peer-to-peer transparent clock. ....................................................... 30

Figure 10 ⎯Simple master−slave clock hierarchy ............................................................................... 32

Figure 11 ⎯Pruned mesh topology ...................................................................................................... 33

Figure 12 ⎯Basic synchronization message exchange ........................................................................ 34

Figure 13 ⎯Link delay measurement................................................................................................... 35

Figure 14 ⎯Timestamp generation model............................................................................................ 36

Figure 15 ⎯Hierarchical topology ....................................................................................................... 37

Figure 16 ⎯Linear topology................................................................................................................. 38

Figure 17 ⎯Multiply connected topology............................................................................................ 39

Figure 18 ⎯Bridging disparate technologies........................................................................................ 40

Figure 19 ⎯Definition of latency constants ......................................................................................... 45

Figure 20 ⎯Propagation asymmetry .................................................................................................... 47

Figure 21 ⎯Port model ........................................................................................................................ 48

Figure 22 ⎯Scaled log variance hysteresis .......................................................................................... 60

Figure 23 ⎯State machine for a full implementation........................................................................... 78

Figure 24 ⎯State machine for a slave-only implementation................................................................ 79

Figure 25 ⎯STATE_DECISION_EVENT logic ................................................................................. 81

Figure 26 ⎯State decision algorithm ................................................................................................... 87

Figure 27 ⎯Data set comparison algorithm, part 1 .............................................................................. 89

Figure 28 ⎯Data set comparison algorithm, part 2 .............................................................................. 90

Figure 29 ⎯Receipt of Announce message logic................................................................................. 96

Figure 30 ⎯Receipt of Sync message logic ......................................................................................... 98

Figure 31 ⎯Receipt of Follow_Up message logic ............................................................................. 100

Figure 32 ⎯Receipt of Delay_Req message logic ............................................................................. 101

Figure 33 ⎯Receipt of Delay_Resp message logic............................................................................ 103

Figure 34 ⎯Delay request-response path length measurement.......................................................... 110

xvii

Figure 35 ⎯Peer delay link measurement .......................................................................................... 113

Figure 36 ⎯Permitted mixed system configuration ........................................................................... 183

Figure 37 ⎯Profile print form............................................................................................................ 186

Figure C.1⎯Master, end-to-end, and slave one-step clocks; no asymmetry correction ............................ 201

Figure C.2⎯Master, end-to-end, and slave one-step clocks; with asymmetry correction ......................... 202

Figure C.3⎯Master two-step and end-to-end transparent and slave one-step clocks; with asymmetry

correction.................................................................................................................................................... 204

Figure C.4⎯Master and end-to-end transparent, two-step, and one-step, slave clocks; with asymmetry

correction.................................................................................................................................................... 206

Figure C.5⎯One-step master, two-step end-to-end transparent, and one-step slave clocks; with asymmetry

correction.................................................................................................................................................... 208

Figure C.6—One-step peer responder, end-to-end transparent, and peer requestor clocks; with asymmetry

correction.................................................................................................................................................... 210

Figure C.7—One-step peer responder, two-step end-to-end transparent, and one-step peer requestor clocks;

with asymmetry correction ......................................................................................................................... 211

Figure C.8—Two-step peer responder, two-step end-to-end transparent, and one-step peer requestor clocks:

option 1; with asymmetry correction.......................................................................................................... 212

Figure C.9—Two-step peer responder, two-step end-to-end transparent, and one-step peer requestor clocks:

option 2; with asymmetry correction.......................................................................................................... 214

Figure C.10—Two-step peer responder, one-step end-to-end transparent, and one-step peer requestor

clocks: option 2; with asymmetry correction.............................................................................................. 216

Figure C.11—One-step peer master, two-step peer-to-peer transparent, and one-step peer slave clocks; time

computation................................................................................................................................................ 217

Figure G.1⎯ Event message timestamp point ........................................................................................... 225

Figure I.1⎯PROFINET region combined with domains........................................................................... 231

Figure K.1⎯PTP secure message processing ............................................................................................ 252

Figure K.2⎯Challenge processing............................................................................................................. 254

Figure K.3⎯Secure transmit processing.................................................................................................... 256

Figure K.4⎯Secure event processing ........................................................................................................ 258

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