3D NoC能量优化：Logistic函数适应性遗传算法映射策略

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"基于Logistic函数的自适应遗传算法进行3D NoC的节能映射" 在3D Network-on-Chip (3D NoC) 设计中，映射应用程序任务是一项关键问题，因为它直接影响网络的性能、能效和可靠性。本文提出了一种创新的基于Logistic函数的自适应遗传算法（LFAGA），该算法专门针对均匀3D NoC的能量感知映射。传统的映射策略可能无法有效地平衡能量消耗和性能，而LFAGA旨在解决这一挑战，同时提高收敛速度并避免过早收敛。首先，文章详细阐述了映射问题的建模过程，对比了标准遗传算法（SGA）与LFAGA之间的差异。LFAGA的核心在于利用Logistic函数来动态调整遗传算法的参数，以适应不同阶段的优化需求。Logistic函数的增长特性使得LFAGA能在初期快速探索解决方案空间，而在后期则逐渐减缓搜索速度，从而实现更精细的优化。实验部分展示了LFAGA相对于混沌遗传映射算法（CGMAP）的优势。在一项实验中，将一个大小为27的任务图映射到3x3x3的3D NoC上，LFAGA的收敛速度比CGMAP快2.55倍。随着任务规模扩大到64，网络扩展至4x4x4，LFAGA仍能保持更快的收敛速度，达到2.31倍。这些结果显示LFAGA在不同规模的3D NoC上都能保持高效。此外，LFAGA在能耗优化方面也表现出色。在4x4x4的3D NoC上，LFAGA找到的解决方案比CGMAP节省了30.0%的能耗。对于实际应用，如3x4x2的配置，LFAGA实现了18.6%的节能，并且其收敛速度是CGMAP的1.58倍，表明LFAGA不仅在理论上的优越性，也能在实际场景中取得显著效果。总结来说，LFAGA通过引入Logistic函数和自适应机制，为3D NoC的能量感知映射提供了一种有效的方法。它在保持快速收敛速度的同时避免了过早收敛，提高了能效并优化了网络性能。这对于应对不断增长的计算需求和资源限制的3D NoC设计具有重要的实际意义。

Chinese Journal of Electronics

Vol.23, No.2, Apr. 2014

Energy-Eﬃcient Mapping for 3D NoC Using

Logistic Function Based Adaptive Genetic

Algorithms

∗

WANG Jiawen, LI Li, WANG Zhongfeng, ZHANG Rong and ZHANG Yuang

(Institute of VLSI Design, LAPEM, Nanjing University, Nanjing 210093, China)

Abstract — The problem of mapping application tasks

is one of key issues in 3D Network on chip (3D NoC) de-

sign. A novel Logistic function based adaptive genetic al-

gorithm (LFAGA) is proposed for energy-aware mapping

of homogeneous 3D NoC. We formulate the mapping prob-

lem and show the Standard genetic algorithm (SGA). The

LFAGA is presented in detail with the goal of obtaining

higher convergence speed while preventing the premature

convergence. Experimental results indicate that the pro-

posed LFAGA is more eﬃcient than previously proposed

Chaos-genetic mapping algorithm (CGMAP). In the ex-

periments, a randomly generated task graph of size 27 is

mapped to a 3D NoC of size 3×3×3, the convergence speed

of LFAGA is 2.55 times faster than CGMAP in the best

condition. When the task size increases to 64 and the 3D

NoC size extends to 4×4×4, LFAGA is 2.31 times faster

compared to CGMAP. For the NoC sizes in the range from

3×3×2to4×4×4, solutions obtained by the LFAGA are

consistently better than the CGMAP. For example, in the

experiment of size 4×4×4, the improvement of ﬁnal result

reaches 30.0% in term of energy consumption. For a real

application of size 3×4×2, 18.6% of energy saving can be

achieved and the convergence speed is 1.58 times faster

than that of the CGMAP.

Key words — Energy-aware mapping, 3D NoC, Logisitc

function, Adaptive genetic algorithm, Convergence speed.

I. Introduction

As the number of transistors on a chip continues to in-

crease, the traditional infrastructure cannot handle intensive

communications on chip eﬀectively. Thus Network on chip

(NoC) was proposed as a promising alternative due to its per-

formance scalability and communication parallelism

[1,2]

.Typ-

ically, a NoC is formed by a global network which is composed

of a set of routers and computational or memory resources

which are connected to routers. Since the global network plays

a major role in the NoC design, lots of research groups have

paid special attentions on this aspect. However, according to

the NoC evolution, which forecasts that hundreds and even

thousands of cores will be integrated in one NoC in a few

years, the conventional two Dimensional (2D) interconnections

are considered as an ineﬃcient architecture due to several in-

surmountable problems such as global wire length and packet

transfer delay. Meanwhile, relying on its potential to improve

chip performance, functionality, and device packing density

[3]

three Dimensional (3D) Integrated circuits (ICs) is emerging

as a novel approach. Considering the advantages of aforemen-

tioned technologies, 3D NoC is proposed as a combination of

both

[4]

to enhance architectural advantages of NoC.

Many challenges have to be faced during the design space

exploration of 3D NoC, and among all these issues, mapping is

one of key steps which may have great inﬂuence on the overall

system performance at the beginning of NoC design. Usually,

at early stages of a new design, the NoC communication back-

bone (e.g., the topology and the size) has to be decided ﬁrst

and then a set of IP cores are chosen depending on various

kinds of tasks. After those tasks are assigned to diﬀerent IP

cores and the Application characterization graph (APCG) is

formed (the accurate deﬁnition of APCG will be given in sec-

tion

). Then the mapping problem can be deﬁned as how

to topologically place the selected set of IP cores onto the re-

source nodes of the network such that the metrics of interest

are optimized

[5]

. In this work, we assume that steps before

mapping are already completed and we mainly focus on the

mapping problem.

There are two main challenges for NoC mapping as shown

in Fig.1: (1) an eﬀective algorithm for mapping and (2) an

accurate model for solution evaluation. That is to say, ﬁrstly

we have to ﬁnd a method to decide how to assign IPs to a par-

ticular topology, and secondly we have to build an analytical

modelsoastoevaluateifthemethodwechooseiseﬀectiveor

not. In this paper, we mainly focus on the ﬁrst one. As we all

know that mapping is a quadratic assignment problem which is

Non-deterministic polynomial-time hard (NP-hard) and there

exists n! possible solutions for a 3D NoC of n nodes.

Since the exhaustive search algorithm is obviously infea-

sible, lots of approximation algorithms such as heuristic algo-

rithms have been proposed. Being one of the most important

∗

Manuscript Received Jan. 2012; Accepted May 2013. This work is supported in part by the National Nature Science Foundation

of China (No.61176024, No.61006018), Research Fund for the Doctoral Program of Higher Education of China (No.20120091110029), A

Project Funded by the Priority academic program development (PAPD) of Jiangsu Higher Education Institutions.

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