RT8206BGQW：高效率笔记本电源控制器数据手册

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RT8206A/B是一款由Richtek公司生产的高效能、双步降压开关模式电源控制器，专为笔记本电脑等便携式设备设计。该数据手册发布于2011年8月，符合RoHS规范，并能满足当前IPC/JEDEC J-STD-020标准的要求，适用于无铅或铅的焊接过程。这款控制器的主要特性包括： 1. 电压调节能力：RT8206A/B具有两个预设的PWM控制器，固定输出电压为5V和3.3V，同时也支持从2V到5.5V的可调范围。对于更高级别的定制，它配备了可选的外部升压转换器，可通过SECFB功能监控其工作状态。 2. 线性稳压器：除PWM控制器外，它还内置一个固定的5V输出线性稳压器，能够提供高达70mA的输出电流。为了增强稳定性，线性稳压器具备自动 bootstrap 功能，利用BYP输入进行启动，确保在低负载条件下也能稳定运行。 3. 电源管理：RT8206A/B集成了全面的电源管理功能，包括内置的上电顺序控制、电源良好输出信号以及内部软启动和软关闭机制，有效防止了系统在关机时产生负电压，提高了系统的可靠性。 4. 无传感器控制：采用恒定占空比PWM控制技术，无需额外的感应电阻，能够实现快速响应，大约在100ns级别，显著提升了电源转换效率和响应速度。 5. 应用范围广泛：由于其高效的性能和广泛的电压调节选项，RT8206A/B被广泛应用于各类笔记本电脑、山寨迷你主机以及其他需要高效小型电源解决方案的设备中。 RT8206A/B是设计者在追求电池供电系统中节省能源、提高效率和简化电路设计的理想选择，尤其对于对功耗和尺寸敏感的现代电子设备而言，它的存在无疑提升了整体系统的竞争力和用户体验。

RT8206A/B

DS8206A/B-06 August 2011 www.richtek.com

Functional Pin Description

REF (Pin 1)

2V Reference Output. Bypass to GND with a 0.22μF

capacitor. REF can source up to 50μA for external loads.

Loading REF degrades FBx and output accuracy according

to the REF load regulation error.

TON (Pin 2)

Frequency Select Input. (VOUT1/VOUT2 switching

frequency, respectively) :

TON = VCC, (200kHz / 250kHz)

TON = REF, (300kHz / 375kHz)

TON = GND, (400kHz / 500kHz)

VCC (Pin 3)

Analog Supply Voltage Input for the PWM Core. Bypass

to GND with a 1μF ceramic capacitor

ENLDO (Pin 4)

LDO Enable Input. The REF/LDO is enabled if ENLDO is

within logic high level and disable if ENLDO is less than

the logic low level.

NC (Pin 5, 8)

No Internal Connection.

VIN (Pin 6)

Power supply Input. VIN is used for the constant on-time

PWM one shot circuits. VIN is also used to power the

linear regulators. The linear regulators are powered by

SMPS1 if VOUT1 is set greater than 4.66V and BYP is

tied to VOUT1. Connect VIN to the battery input and

bypass with a 1μF capacitor.

LDO (Pin 7)

Linear Regulator Output. LDO can provide a total of 70mA

external loads. The LDO regulates a fixed 5V output. When

the BYP is within 5V switchover threshold, the internal

regulator shuts down and the LDO output pin connects to

BYP through a 1.5Ω switch. Bypass LDO output with a

minimum of 4.7μF ceramic.

BYP (Pin 9)

BYP is the switchover source voltage input for the LDO.

VOUT1 (Pin 10)

SMPS1 Output Voltage Sense Input. Connect this pin to

the SMPS1 output. VOUT1 is an input to the Constant

on-time-PWM one-shot circuit. It also serves as the

SMPS1 feedback input in fixed voltage mode.

FB1 (Pin 11)

SMPS1 Feedback Input. Connect FB1 to VCC or GND for

fixed 5V operation. Connect FB1 to a resistive voltage

divider from VOUT1 to GND to adjust output from 2V to

5.5V.

ILIM1 (Pin 12)

SMPS1 Current Limit Adjustment. The GND − PHASE1

current limit threshold is 1/10th the voltage seen at ILIM1

over a 0.5V to 2V range. There is an internal 5μA current

source from VCC to ILIM1. The logic current limit threshold

is default to 100mV if ILIM1 is higher than (VCC − 1V).

PGOOD1 (Pin 13)

SMPS1 Power Good Open-Drain Output. PGOOD1 is low

when the SMPS1 output voltage is more than 7.5% below

the normal regulation point or during soft-start. PGOOD1

is high impedance when the output is in regulation and

the soft-start circuit has terminated. PGOOD1 is low in

shutdown.

EN1 (Pin 14)

SMPS1 Enable Input. The SMPS1 will be enabled if EN1

is greater than the logic high level and disabled if EN1 is

less than the logic low level. If EN1 is connected to REF,

the SMPS1 starts after the SMPS2 reaches regulation

(delay start). Drive EN1 below 0.8V to clear fault level and

reset the fault latches.

UGATE1 (Pin 15)

High Side MOSFET Floating Gate Driver Output for

SMPS1. UGATE1 swings between PHASE1 and BOOT1.

PHASE1 (Pin 16)

Inductor Connection for SMPS1. PHASE1 is the internal

lower supply rail for the UGATE1 high side gate driver.

PHASE1 is the current sense input for the SMPS1.

RT8206A/B

DS8206A/B-06 August 2011www.richtek.com

BOOT1 (Pin 17)

Boost Flying Capacitor Connection for SMPS1. Connect

to an external capacitor according to the typical application

circuits.

LGATE1 (Pin 18)

SMPS1 Synchronous-Rectifier Gate drive Output. LGATE1

swings between PGND and PVCC.

PVCC (Pin 19)

PVCC is the supply voltage for the low side MOSFET

driver LGATEx. Connect a 5V power source to the PVCC

pin (bypass with 1μF MLCC capacitor to PGND if

necessary). There is an internal 10Ω connecting from

PVCC to VCC. Make sure that both VCC and PVCC are

bypassed with 1μF MLCC capacitors.

SECFB (Pin 20) (RT8206A)

The SECFB is used to monitor the optional external 14V

charge pump. Connect a resistive voltage divider from the

14V charge pump output to GND to detect the output. If

SECFB drops below the threshold voltage, LGATE1 will

be turned on for 300ns. This will refresh the external charge

pump driven by LGATE1 without over discharging the

output voltage.

NC (Pin 20) (RT8206B)

No Internal Connection.

GND [Pin 21, 33 (Exposed Pad)]

Analog Ground for both SMPS and LDO. The exposed

pad must be soldered to a large PCB and connected to

GND for maximum power dissipation.

PGND (Pin 22)

Power Ground for SMPS controller. Connect PGND

externally to the underside of the exposed pad.

LGATE2 (Pin 23)

SMPS2 Synchronous-Rectifier Gate drive Output. LGATE2

swings between PGND and PVCC.

BOOT2 (Pin 24)

Boost Flying Capacitor Connection for SMPS2. Connect

this pin to an external capacitor according to the typical

application circuits.

PHASE2 (Pin 25)

Inductor Connection for SMPS2. PHASE2 is the internal

lower supply rail for the UGATE2 high side gate driver.

PHASE2 is the current sense input for the SMPS2.

UGATE2 (Pin 26)

High Side MOSFET Floating Gate Driver Output for

SMPS2. UGATE2 swings between PHASE2 and BOOT2.

EN2 (Pin 27)

SMPS2 Enable Input. The SMPS2 will be enabled if EN2

is greater than the logic high level and be disabled if EN2

is less than the logic low level. If EN2 is connected to

REF, the SMPS2 starts after the SMPS1 reaches

regulation (delay start). Drive EN2 below 0.8V to clear

fault level and reset the fault latches.

PGOOD2 (Pin 28)

SMPS2 Power Good Open-Drain Output. PGOOD2 is low

when the SMPS2 output voltage is more than 7.5% below

the normal regulation point or during soft-start. PGOOD2

is high impedance when the output is in regulation and

the soft-start circuit has terminated. PGOOD2 is low in

shutdown.

SKIP (Pin 29)

SMPS Operation Mode Control.

SKIP = GND : DEM operation

SKIP = REF : Ultrasonic Mode operation

SKIP = VCC : PWM operation.

VOUT2 (Pin 30)

SMPS2 Output Voltage Sense Input. Connect this pin to

the SMPS2 output. VOUT2 is an input to the constant

on-time-PWM one-shot circuit. It also serves as the

SMPS2 feedback input in fixed voltage mode.

ILIM2 (Pin 31)

SMPS2 Current Limit Adjustment. The GND − PHASE2

current limit threshold is 1/10th the voltage seen at ILIM2

over a 0.5V to 2V range. There is an internal 5μA current

source from VCC to ILIM2. The logic current limit threshold

is default to 100mV value if ILIM2 is higher than (VCC −

1V).

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